Browsing by Author "Lee, MZ"

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Characteristics of vertical thermal/PECVD polysilicon oxides formed on the sidewall of polysilicon films
(2003-01-01)
Lee, MZ
;
Chang, YA
;
Lee, CL
;
Lei, TF
;
電子工程學系及電子研究所
Vertical thermal and PECVD (plasma enhanced chemical vapor deposition) polysilicon oxides, formed on polysilicon sidewalls, are investigated to demonstrate that the oxides on polysilicon sidewalls have much better electrical qualities than do conventional planar polysilicon oxides. For thermally grown vertical polysilicon oxides, the charges-to-breakdown were as high as 10 C/cm(2), values that are comparable to that of the single crystal oxide. This improvement is primarily due to the fewer number of grain boundaries in the vertical direction of the polysilicon. (C) 2002 The Electrochemical Society.
Improvement of junction leakage by using a Zr cap layer on a 30 nm ultrashallow nickel-silicide junction
(2005)
Lee, TL
;
Lee, MZ
;
Lei, TF
;
Lee, CL
;
電子工程學系及電子研究所
This paper investigates the effects of Zr capping on nickel silicided n(+)/p shallow junctions. Although nickel silicide possesses many benefits compared with titanium and cobalt silicide, some potential problems still need to be addressed for ultrashallow junction applications. In this work, a Zr protective cap is used to preserve the silicide from oxygen contamination and to suppress the increase of junction leakage during the silicidation process. Due to the suppressed leakage current and the appropriate series resistence, formation of a 30 nm ultrashallow junction can be accomplished. (C) 2005 The Electrochemical Society.
Memory properties of metal/ferroelectric/semiconductor and metal/ferroelectric/insulator/semiconductor structures using rf sputtered ferroelectric Sr0.8Bi2.5Ta1.2Nb0.8O9 thin films
(2004-07-01)
Huang, CH
;
Wang, YK
;
Lue, HT
;
Huang, JY
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Lee, MZ
Off-axis rf magnetron sputtering has been employed to grow Sr0.8Bi2.5Ta1.2Nb0.8O9 (SBTN) ferroelectric thin films with (115) preferred orientation on SiO2/Si and Si substrates. The lower temperature and the higher oxygen mixing ratios [OMR, O-2/ (Ar+O-2)] used in film processing lead to reduction in the leakage current densities and widening the memory window of the resultant metal-ferroelectric-insulator semiconductor (MRS) structures. The maximum memory windows of the MFIS structures based on 40% OMR SBTN films deposited at 500 degreesC on SiO2/Si substrate are 2.87 and 2.27 V at the bias amplitudes of 10 and 8 V, respectively. With increasing applied voltage, the memory window also increases. The memory window decreases from 2.27 to 1.59 V after the 10(11) switching cycles at a bias amplitude of 8 V. The capacitance difference, DeltaC, between the two states decreases by 48% after retention time of 7000 s. (C) 2003 Elsevier Ltd. All rights reserved.
Novel vertical polysilicon thin-film transistor with excimer-laser annealing
(2003-04-01)
Lee, MZ
;
Lee, CL
;
Lei, TF
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
In this paper, we propose a novel self-alignment vertical thin-film transistor (VTFT) structure with excimer laser annealing (ELA). The ELA on source and drain decreases the process temperature, suppresses the lateral diffusion of dopants in short channel devices and increases the driving current. Furthermore, the VTFTs have high carrier mobility, compared to conventional polysilicon thin film transistors (TFTs).