Browsing by Author "Lee, RGH"

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A new method for characterizing the spatial distributions of interface states and oxide-trapped charges in LDD n-MOSFET's
(1996-01-01)
Lee, RGH
;
Su, JS
;
Chung, SS
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Previous studies showed that simultaneous determination of the interface states (N-it) and oxide-trapped charges (Q(ox)) in the vicinity of the drain side in MOS devices was rather difficult, A new technique which allows a consistent characterization of the spatial distributions of both hot-carrier-induced N-it and Q(ox) is presented, Submicron LDD n-MOS devices were tested and charge pumping measurements were performed, The spatial distributions of both N-it and Q(ox) have been justified by two-dimensional (2-D) device simulation of the I-V characteristics for devices before and after the stress. Comparison of the drain current characteristics between simulation and experiment shows very good agreement. Moreover, results show that fixed-oxide charge effect is less pronounced to the device degradation for devices.
An efficient method for characterizing time-evolutional interface state and its correlation with the device degradation in LDD n-MOSFET's
(1996-06-01)
Lee, RGH
;
Wu, JP
;
Chung, SS
;
電子工程學系及電子研究所
;
電控工程研究所
A new characterization method is proposed to study the relationship between the hot-carrier-induced interface state N-it(x) and the device drain current degradation of submicron LDD n-MOSFET's. In this method, by making use of the conventional charge pumping measurement in combination with the power-lay dependence of interface damages on stress time, the spatial distribution N-it(x) and the effective damaged length L(dam) can be easily extracted. The time evolution of the interface state generation and its correlation with the device degradation can then be well explained. It is worthwhile to note that this newly-developed method requires no repetitive charge pumping measurements, and hence avoids he likely imposition of se-stress on tested devices. By combining the characterized L(dam) and N-it quantitatively, the results show that the damage at V-GS approximate to V-DS/2 is most highly localized among various stress biases, which can explain why the generated interface states will dominate the device drain current degradation at this bias after long-term operating conditions.