Browsing by Author "Lee, Tsern-Huei"

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A Bandwidth Efficient Pairing Strategy for the MIMO-OFDM Based WLANs
(2009)
Lee, Tsern-Huei
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Hsieh, Jing-Rong
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Huang, Ming-Chih
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Huang, Yu-Wen
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電信工程研究所
The advanced MIMO (multiple-input multiple-output) system can provide higher capacity gain or higher diversity gain in modern wireless networks. The capacity gain is achieved by interference cancelation technique to fully utilize the spatial degree of freedom. In a multiuser wireless system, the increased degrees of freedom provide the chance to select multiple wireless stations (STAs) to maximize the throughput. In this paper, we consider a scenario where the access point (AP) equipped with two antennas to simultaneously communicate with two STAs, each with single antenna. After obtaining the statuses of the size of buffered traffic and the achievable transmission rate, the AP should pair compatible STAs to minimize the loss of spatial degree of freedom. Therefore, three pairing algorithms are proposed and are evaluated through computer simulations. The algorithms have much less implementation complexity than the brute force pairing algorithm and achieve satisfactory performance of throughput.
A Data Mapping Algorithm for Two-Level Requests in WiMAX Systems
(2012)
Lee, Tsern-Huei
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Liu, Chi-Hsien
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Campbell, Arleth Soleiy Garth
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Kuo, Yaw-Wen
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傳播研究所
The IEEE 802.16e standard known as Mobile WiMAX has recently been introduced. It is considered as one of the most promising wireless access technologies supporting high data throughput with low cost of deployment. Mobile WiMAX makes use of Orthogonal Frequency-Division Multiple Access (OFDMA) digital modulation scheme as the transmission method. With the constraint requires that all requests have to be mapped as a rectangle, it is shown that finding an optimum mapping solution is an NP-complete problem. Many burst mapping algorithms have been proposed, but none considered the case with prioritized requests. This paper presents an efficient packing algorithm for two-level requests with two targets: (1) map high (MUST part) priority data as much as possible; and (2) achieve high efficiency, reduces the number of unused slots, and minimizes the mapping information overhead. Simulation results show that the proposed algorithm achieves high efficiency.
A Downlink Mapping Algorithm for Two-Level Requests in IEEE 802.16e Systems under AMC Mode
(2013)
Yang, Zi-Yang
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Kuo, Yaw-Wen
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Lee, Tsern-Huei
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傳播研究所
;
Institute of Communication Studies
This paper proposes a downlink mapping algorithm for two-level requests in Orthogonal Frequency Division Multiple Access based IEEE 802.16e systems under the Adaptive Modulation and Coding (AMC) mode by which the modulation and coding scheme (MCS) of a user may be different for available subchannels. Given a set of requests each with two priorities, the proposed algorithm efficiently allocates a two-dimensional (time and frequency) burst with a suitable MCS to each user to maximize the system throughput with service differentiation. Simulation results show that the proposed algorithm outperforms the Efficient Downlink Mapping Allocation (EDMA) algorithm [5] in terms of the throughput of high priority data, but slightly sacrifice in overall throughput. The proposed algorithm can improve up to 98.8% more the average allocated ratio of urgent data than the EDMA.
A Fast Scalable Automaton-Matching Accelerator for Embedded Content Processors
(2009-04-01)
Tseng, Kuo-Kun
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Lai, Yuan-Cheng
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Lin, Ying-Dar
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Lee, Tsern-Huei
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資訊工程學系
Home and office network gateways often employ a cost-effective embedded network processor to handle their network services. Such network gateways have received strong demand for applications dealing with intrusion detection, keyword blocking, antivirus and antispam. Accordingly, we were motivated to propose an appropriate fast scalable automaton-matching (FSAM) hardware to accelerate the embedded network processors. Although automaton matching algorithms are robust with deterministic matching time, there is still plenty of room for improving their average-case performance. FSAM employs novel prehash and root-index techniques to accelerate the matching for the nonroot states and the root state, respectively, in automation based hardware. The prehash approach uses some hashing functions to pretest the input sub-string for the nonroot states while the root-index approach handles multiple bytes in one single matching for the root state. Also, FSAM is applied in a prevalent automaton algorithm, Aho-Corasick (AC), which is often used in many content-filtering applications. When implemented in FPGA, FSAM can perform at the rate of 11.1Gbps with the pattern set of 32,634 bytes, demonstrating that our proposed approach can use a small logic circuit to achieve a competitive performance, although a larger memory is used. Furthermore, the amount of patterns in FSAM is not limited by the amount of internal circuits and memories. If the high-speed external memories are employed, FSAM can support up to 21,302 patterns while maintaining similar high performance.
A high-performance memory-efficient pattern matching algorithm and its implementation
(2006)
Lee, Tsern-Huei
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Liang, Chia-Chi
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電信工程研究所
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Institute of Communications Engineering
Because of its accuracy, pattern matching technique has recently been applied to Internet security applications such as intrusion detection/prevention, anti-virus, and anti-malware. Among the various pattern matching algorithms, the Aho-Corasick (AC) can match multiple pattern strings simultaneously with worst-case performance guarantee and thus is widely adopted. However, the throughput performance of the original AC may not be satisfactory for high speed environments because only one symbol is processed in an operation cycle. In this paper we present an extension of the AC algorithm where multiple symbols are processed in an operation cycle to improve throughput performance. In our proposed scheme, all pattern strings, and the input text string as well, are divided into K substrings, if K symbols are processed in an operation cycle. Moreover, K pattern search engines are employed to scan the text substrings in parallel. As a result, the throughput performance can be improved by K times. We implemented our proposed pattern matching scheme with Xilinx FPGA and achieved more than 4.5Gbps throughput for K = 4.
A Low Overhead Queue Status Report Scheme for QoS Support in WLANs
(2009)
Lee, Tsern-Huei
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Huang, Yu-Wen
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Yang, Chun-Chieh
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電信工程研究所
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Institute of Communications Engineering
HCF Controlled Channel Access (HCCA), defined in the IEEE 802.11e document, provides a sample scheduler to allocate transmission opportunity (TXOP) to QoS-aware stations (QSTAs). Since the calculation of TXOP duration is based on mean data rate, it is efficient for constant bit rate (CBR) traffic. For variable bit rate (VBR) traffic, however, delay bound of some admitted traffic flows may be violated. Several previous works suggested that, through reporting queue status to schedulers, each QSTA can be allocated sufficient transmission opportunity (TXOP) for its buffered packets to meet delay bound requirement. However, timely queue status reports may cause considerable overheads and lead to inefficient bandwidth utilization. In this paper, we propose a low overhead queue status report scheme based on multi-polling technique and earliest deadline first policy (EDF) to provide QoS support. Simulation results show that our proposed scheme can not only meet the QoS requirements but also manage the bandwidth more efficiently than previous works.
A Pattern-Matching Scheme With High Throughput Performance and Low Memory Requirement
(2013-08-01)
Lee, Tsern-Huei
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Huang, Nai-Lun
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傳播研究所
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Institute of Communication Studies
Pattern-matching techniques have recently been applied to network security applications such as intrusion detection, virus protection, and spam filters. The widely used Aho-Corasick (AC) algorithm can simultaneously match multiple patterns while providing a worst-case performance guarantee. However, as transmission technologies improve, the AC algorithm cannot keep up with transmission speeds in high-speed networks. Moreover, it may require a huge amount of space to store a two-dimensional state transition table when the total length of patterns is large. In this paper, we present a pattern-matching architecture consisting of a stateful pre-filter and an AC-based verification engine. The stateful pre-filter is optimal in the sense that it is equivalent to utilizing all previous query results. In addition, the filter can be easily realized with bitmaps and simple bitwise-AND and shift operations. The size of the two-dimensional state transition table in our proposed architecture is proportional to the number of patterns, as opposed to the total length of patterns in previous designs. Our proposed architecture achieves a significant improvement in both throughput performance and memory usage.
A platform-based SoC design and implementation of scalable automaton matching for deep packet inspection
(2007-12-01)
Lin, Ying-Dar
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Tseng, Kuo-Kun
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Lee, Tsern-Huei
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Lin, Yi-Neng
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Hung, Chen-Chou
String matching plays a central role in packet inspection applications such as intrusion detection, anti-virus, anti-sparn and Web filtering. Since they are computation and memory intensive, software matching algorithms are insufficient to meet the high-speed performance. Thus, offloading packet inspection to a dedicated hardware seems inevitable. This paper presents a scalable automaton matching (SAM) coprocessor that uses Aho-Corasick (AC) algorithm with two parallel acceleration techniques, root-indexing and pre-hashing. The root-indexing can match multiple bytes in one single matching, and the pre-hashing can be used to avoid bitmap, AC matching which is a cycle-consuming operation. In the platform-based SoC implementation of the Xilinx ML310 FPGA, the proposed hardware architecture can achieve almost 10.7 Gbps and support over 10,000 patterns for virus, which is the largest pattern set from among the existing works. On the average, the performance of SAM is 7.65 times faster than the original bitmap AC. Furthermore, SAM is feasible for either internal or external memory architecture. The internal memory architecture provides high performance, while the external memory architecture provides high scalability in term of the number of patterns. (C) 2007 Elsevier B.V. All rights reserved.
A Rearrangement Algorithm for Scheduled Automatic Power Save Delivery of Wireless LANs
(2010)
Lee, Tsern-Huei
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Hsieh, Jing-Rong
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Chen, Hsiao-Wei
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傳播研究所
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Institute of Communication Studies
One of the major challenges to integrate the wireless LAN technology into portable devices is the limited battery life. The IEEE 802.11e introduced an advanced architecture to improve 802.11 power saving mechanism, named Scheduled Automatic Power Save Delivery (S-APSD). In S-APSD, the access point negotiates periodical schedules with wireless Stations (STA) to deliver buffered traffic and thus prevents the need to poll for each frame by STAs. In S-APSD, in order to reduce wastage of energy, the AP has to avoid overlapping of Service Periods (SPs). Based on existing scheduled events (SEs), the OAS-APSD (Overlapping Aware S-APSD) and LCS-APSD (Low Complexity S-APSD) were proposed to incrementally select the Service Start Times (SSTs) for the new joining traffic streams (TSs) to minimize the chance of SP overlapping. However, in this scheduling fashion, the resulted power saving performance depends on the joining order of TSs and thus may be unsatisfactory. Therefore, our idea is to rearrange the relative offsets of existing SEs to enlarge the system minimum distance. From numerical results, we find that the proposed scheduling algorithms can provide better power saving.
Adaptive Sequential Hypothesis Testing for Accurate Detection of Scanning Worms
(2009)
Lee, Tsern-Huei
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Lee, Sung-Yen
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電信工程研究所
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Institute of Communications Engineering
Early detction techniques of scaning worms are based on simple observations of high port/address scanning rates of malicious hosts. Such apporaches are not able to detect stealthy scanners and can be easily evaded once the threshold of scanning rate for generating alerts is known to the attackers. To overcome this problem, sequential hypothesis testing was developed as an alternative detection technique. It was found that the technique based on sequential hypothesis testing can detect scanning worms faster than those based on scanning rates in the sense that it needs fewer observations for the outcomes of connection attempts. However, the performance of the detection technique based on sequential hypothesis testing is sensitve to the probabilities of success for the first-contact connection attempts sent by benign and malicious hosts. The false positive and false negative probabilities could be much larger than the desired values if these probabilities are not known. In this paper, we presnt a simple adpative algorithm which provides accurate estimates of these probabilities. Numerical results show that the proposed adaptive estimation algorithm is an important enhancement of sequential hypothesis testing because it makes the technique robust for detection of scanning worms.
An analysis of channel utilization for the IEEE 802.11 with aggregation
(2006)
Sung, Cheng-Chia
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Kuo, Yaw-Wen
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Lee, Tsern-Huei
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電信工程研究所
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Institute of Communications Engineering
The IEEE 802.11 MAC provides a method for multiple users to share the wireless media. The channel utilization is limited because of protocol overhead no matter how fast the payload is transmitted. To increase utilization, frame aggregation is a straightforward way to improve the channel efficiency. This paper presents an analytic method to estimate the utilization for RTS/CTS-based contention access mechanism with unidirectional or bidirectional aggregation. Simulation results are also provided to show the accuracy of the analytic model.
An Efficient and Scalable Pattern Matching Scheme for Network Security Applications
(2008)
Lee, Tsern-Huei
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Huang, Nai-Lun
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電信工程研究所
;
Institute of Communications Engineering
Because of its accuracy, pattern matching technique has recently been applied to Internet security applications such as intrusion detection/prevention, anti-virus, and anti-malware. Among various famous pattern matching algorithms, the Aho-Corasick (AC) can match multiple pattern strings simultaneously with worst-case performance guarantee and is adopted in both Clam AntiVirus (ClamAV) and Snort intrusion detection open sources. The AC algorithm is based on finite automaton which can be implemented straightforwardly with a two-dimensional state transition table. However, the memory requirement prohibits such an implementation when the total length of the pattern strings is large. The ClamAV implementation limits the depth of the finite automaton and combines with linked lists to reduce memory requirement. The banded-row format is adopted to compress the state transition table and used as an alternative pattern matching machine in Snort. In this paper we present a novel implementation which requires small memory space and achieves high throughput performance. Compared with the banded-row format, our proposed scheme achieves 39.7% reduction in memory requirement for 5,000 patterns randomly selected from ClamAV signatures. Besides, the processing time of our proposed scheme is, on the average, 83.9% of that of the banded-row format for scanning various types of files. Compared with the ClamAV implementation with the same 5,000 patterns and files, our proposed scheme requires slightly more memory space but achieves 80.6% reduction in processing time on the average.
An Efficient Downlink Mapping Algorithm for AMC Mode in WiMAX Systems
(2012)
Lee, Tsern-Huei
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Yang, Zi-Yang
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Huang, Qi-Quan
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Kuo, Yaw-Wen
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傳播研究所
This paper proposes an efficient downlink resource allocation scheme for Orthogonal Frequency Division Multiple Access based WiMAX systems using the Adaptive Modulation and Coding mode operation. Given a set of user requests, the proposed algorithm determines the modulation scheme and allocates a two-dimensional (time and frequency) burst to each user. It is known that finding the optimal solution for such a resource allocation problem is NP-complete. To reduce the computation complexity, this paper proposes a heuristic solution. Compared with the Efficient Downlink Bandwidth Allocation (EDBA) algorithm [6], the proposed scheme achieves higher channel utilization and system throughput with similar execution time. Simulation results show that the average channel utilization of the proposed scheme is about 75 similar to 85% and that of EDBA is about 60 similar to 70%.
An efficient pattern matching scheme in LZW compressed sequences
(2008-07-01)
Lee, Tsern-Huei
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Huang, Nai-Lun
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電信工程研究所
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Institute of Communications Engineering
Compressed pattern matching (CPM) is an emerging research field addressing the problem: given a compressed sequence and a pattern, process the sequence with minimal (or no) decompression to find the pattern occurrence(s) in the uncompressed sequence. It can be applied to detect malwares and confidential information leakage in compressed files directly. In this paper, we report our work of CPM in Lempel-Ziv-Welch (LZW) compressed sequences. We propose an efficient bitmap-based realization of the Amir-Benson-Farach algorithm. We also generalize the algorithm to find all pattern occurrences and report their absolute positions in the uncompressed sequence. Experiments are conducted to test the space requirements of our proposed generalization and two related CPM schemes which can also be realized with bitmaps. Results show that our proposed generalization requires the least amount of storage for moderate and long patterns. We also conduct experiments to compare the throughput performance of our proposed generalization with these two related CPM schemes and the decompress-then-search scheme. Results show that our proposed generalization outperforms the decompress-then-search scheme significantly. When scanning a file with pattern occurrences, our proposed generalization performs slightly better than the two related CPM schemes. The difference is significant when scanning a file with no pattern occurrence. Copyright (c) 2008 John Wiley & Sons, Ltd.
An energy saving scheme with error recovery for multi-polling in wireless LANs
(2008)
Hsieh, Jing-Rong
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Lee, Tsern-Huei
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電信工程研究所
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Institute of Communications Engineering
Various multi-polling schemes have recently been proposed to reduce the overhead resides in legacy IEEE 802.11 WLAN protocols. In particular, the Two-Step Multi-Polling (TSMP) scheme utilizes the acquired buffer status and channel condition to derive exact required time of each wireless station. Consequently, it seems to he easy to incorporate an energy saving schedule to prolong the operating time of the portable devices. However, even though it adopted the concept of rate adaptation, the TSMP scheme did not take into account frame retransmissions caused by transmission errors due to, say, fading of the wireless channel. The uncertain time spent on retransmission of former stations in the schedule may introduce energy-consuming overhearing for later ones. In this paper, we propose wake-up time schedules and an adaptive updating algorithm to save more energy for the later stations under the error-prone wireless environment. The proposed scheme is simple and thus quite feasible. Besides, from extensive simulation results, we found that the proposed solution is effective.
An Enhanced Data Mapping Algorithm for Two-Level Requests in WiMAX Systems
(2013)
Lee, Tsern-Huei
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Le, Dinh-Dung
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Kuo, Yaw-Wen
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傳播研究所
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Institute of Communication Studies
The IEEE 802.16e standard, which adopts OFDMA PHY and is generally known as Mobile WiMAX, has grabbed the attention of wireless communication industry for the past few years. It is a technology optimized for IP-based high speed long-distance wireless broadband access. In the downlink of Mobile WiMAX systems, data requests have to be mapped into rectangular regions. Such a constraint results in an NP-complete problem in order to maximize throughput. Several heuristic data mapping algorithms were proposed trying to achieve high system throughput. Most of the algorithms handle only one type of data. In a previous paper, we presented a data mapping algorithm which maps two levels of requests, i.e., urgent and non-urgent data. However, only the numbers of required slots were considered in determining the order of data mapping. In this paper, we propose an enhanced version which considers both the number of required slots and the Modulation and Coding Scheme (MCS) for each mobile station. Simulation results show that, compared with previous design, the enhanced algorithm serves more urgent data with higher throughput.
An I-D Two-State Dynamic Receive Window Adjustment Scheme for Solving Bufferbloat Problems
(2018-01-01)
Lee, Tsern-Huei
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Tsai, Cheng-Jie
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Yang, Yung-Chun
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電機工程學系
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Department of Electrical and Computer Engineering
Bufferbloat is a phenomenon caused by excessive buffering of packets that results in high latency, large jitter, as well as throughput degradation. It happens when a loss-based Transmission Control Protocol (TCP), such as New Reno or Cubic, is used for data transfer. A dynamic receive window adjustment (DRWA) scheme has recently been proposed to solve the bufferbloat problem. It was reported that, with the DRWA scheme, the bufferbloat problem can be effectively solved. However, we found that when there are multiple TCP connections sharing some bottleneck link, the ones with DRWA tend to lose their bandwidth share to those without DRWA. Moreover, when a user equipment establishes multiple TCP connections all implemented with DRWA and all connections pass through the same bottleneck link, the connection which is established last will dominate the bandwidth. In this paper, we present a simple scheme, called I-D (increasing-decreasing) two-state dynamic receive window adjustment, which according to simulation results can effectively solve the bufferbloat problem without the unfair bandwidth-dominating issues.
Application of Smart Appliances to Wireless Area Network and Module Development
(2017-01-01)
Hung, Wei-Ping
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Lee, Tsern-Huei
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Chang, Chia-Hung
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電信工程研究所
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Institute of Communications Engineering
In this paper, we implement the Wi-Fi hardware architecture. The core chip designed by the MediaTek Corporation is used to develop its peripheral circuits. The chip supports USB Type and can control the lighting circuit through the APP on the mobile phone, so as to simulate the switch of household electrical appliances. In the future, consumers can purchase home appliances with built-in communication modules and integrate them with the Home Energy Management System (HEMS), which can be used to control wireless energy-saving.
Design and Evaluation of a High Throughput MAC with QoS Guarantee for Wireless LANs
(2009)
Kuo, Yaw-Wen
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Lee, Tsern-Huei
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Huang, Yu-Wen
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Hsieh, Jing-Rong
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電信工程研究所
The IEEE 802.11e and the IEEE 802.11n focus on quality of service (QoS) and enhancements for high throughput respectively. Modern wireless LAN (WLAN) products should integrate both features. This paper presents a design of a high throughput MAC with QoS guarantee which combines the Hybrid Coordination Function (HCF) of the 802.11e with the frame aggregation technique in the 802.11n. The basic idea of the design is to improve the throughput of best-effort traffic under the constraint that QoS is just met for real-time traffic. Simulation results show that the proposed MAC has high channel utilization and the delay of best-effort traffic is also reduced.
Design and Implementation of Cloud API Access Control Based on OAuth
(2013)
Wu, Meng-Yu
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Lee, Tsern-Huei
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傳播研究所
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Institute of Communication Studies
As the popularity of cloud computing increases, cloud services can provide rich functionality by means of standardized APIs based on open technology. More and more web services offer APIs for application developers to use. APIs act as the intermediate between application developers and web services. The security of cloud computing depends largely on the management of APIs. Hence a strong API access control model is required. In this paper, we design and implement an API access control mechanism based on OAuth which simplifies its process flow under different application scenarios. We also show how access control mechanism can be realized as REST-style web services.