Browsing by Author "Lee Shuenn-Gi"
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Item type:Item, Address generation apparatus and method for quadratic permutation polynomial interleaver(2013-06-18) ;Lee Shuenn-Gi ;Wang Chung HsuanSheen Wern-HoAn address generation apparatus for quadratic permutation polynomial (QPP) interleaver receives several configurable parameters and uses a plurality of QPP units to compute and outputs a plurality of interleaving addresses according to a QPP function Π(i)=(f1i+f2i2) mod k, where f1 and f2 are QPP coefficients, k is information block length of an input sequence, 0≦i≦k−1, and mod is a modulus operation. Each of the plurality of QPP units is a parallel computation unit, and outputs in parallel a corresponding group of interleaver addresses, where Π(i) is also a ith interleaving address generated by the apparatus.Item type:Item, Address generation apparatus and method for quadratic permutation polynomial interleaver de-interleaver(2012-12-11) ;Lee Shuenn-Gi ;Wang Chung-HsuanSheen Wern-HoAn address generation apparatus for a quadratic permutation polynomial (QPP) interleaver is provided. It comprises a basic recursive unit, and L recursive units represented by first recursive unit up to Lth recursive units. The apparatus inputs a plurality of configurable parameters according to a QPP function Π(i)=(f1i+f2i2) mod k, generates a plurality of interleaver addresses in serial via the basic recursive unit, and generates L groups of corresponding interleaver addresses via the first up to the Lth recursive units, wherein Π(i) is the i-th interleaver address generated by the apparatus, f1 and f2 are QPP coefficients, and k is information block length of an input sequence, 0≦i≦k−1.Item type:Item, Multiplexing method and apparatus thereof for data switching(2011-11-15) ;Wang Chung-HsuanLee Shuenn-GiA multiplexing method for data switching is disclosed. In the method, a continuous data is received, and the continuous data includes a plurality of super frames, and each super frame includes a plurality of frames. These super frames are divided into a set of even super frames and a set of odd super frames. The frames included in the set of odd super frames are sorted by corresponding required bit error rate of each frame decreasingly or increasingly. The frames included in the set of even super frames are sorted by the required bit error rate of each frame increasingly or decreasingly. An encoder is used to encode these sorted super frames.