Browsing by Author "Li, Guan-Ru"

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Classifier Grouping to Enhance Data Locality for A Multi-Threaded Object Detection Algorithm
(2011)
Lai, Bo-Cheng Charles
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Chiang, Chih-Hsuan
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Li, Guan-Ru
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電子工程學系及電子研究所
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Department of Electronics Engineering and Institute of Electronics
Object detection has become an enabling function for modern smart embedded devices to perform intelligent applications and interact with the environment appropriately and promptly. However, the limited computation resource of embedded devices has become a barrier to execute the computation intensive object detection algorithm. Leveraging the multi-threading scheme on embedded multi-core systems provides an opportunity to boost the performance. However, the memory bottleneck limits the performance scalability. Improving data locality of applications and maximizing the data reuse for on-chip caches have therefore become critical design concerns. This paper comprehensively analyzes the memory behavior and data locality of a multi-threaded object detection algorithm. A novel Classifier-Grouping scheme is proposed to significantly enhance the data reuse for on-chip caches of embedded multi-core systems. By executing a multi-threaded object detection algorithm on a cycle-accurate multi-core simulator, the proposed approach can achieve up to 62% better performance when compared with the original parallel program.
Multi-Level Parallelism Analysis of Face Detection on a Shared Memory Multi-Core System
(2011)
Chiang, Chih-Hsuan
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Kao, Chih-Heng
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Li, Guan-Ru
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Lai, Bo-Cheng Charles
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電子工程學系及電子研究所
Face detection is one of the fundamental technologies for the future smart objects. However, its computation intensive property thwarts the practice of a real-time application on an embedded device. Parallel processing and many-core architecture have become a mainstream to achieve high performance in the future computing systems. The parallelism of an application needs to be exposed before being exploited by the parallel architecture. This paper performs a comprehensive analysis of the parallelism of a face detection algorithm at different algorithmic levels. This paper has demonstrated that each parallelism level has its own potential to enhance performance, but also imposes different limiting factors to the overall performance. Based on the analysis results and design experience, this paper proposes a multi-staged mixed-level parallelization scheme to retain the performance scalability and avoid the limiting factors. With this scheme, we are able to achieve up to 37.5x performance enhancement on a 64-core system.
Self adaptable multithreaded object detection on embedded multicore systems
(2015-04-01)
Lai, Bo-Cheng Charles
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Li, Kun-Chun
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Li, Guan-Ru
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Chiang, Chin-Hsuan
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交大名義發表
Leveraging multithreading on embedded multicore platforms has been proven effective on handling the increasing resolutions of target stimuli of object detection. However, complex tradeoffs and correlated design impacts between a parallel application and the underlying multicore platform necessitate an effective and adaptable multithreaded design. This paper introduces a hybrid multithreaded object detection with high parallelism and extensive data reuse. A self adaptable flow is proposed to adjust the multithreaded object detection to fully exploit various embedded multicore architectures. The ARM-based cycle accurate simulations of multicore systems have shown the superior performance returned by the proposed design. (C) 2015 Elsevier Inc. All rights reserved.