Browsing by Author "Li, Jun-Yi"

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A Bandwidth-Efficient INT System for Tracking the Rules Matched by the Packets of a Flow
(2019-01-01)
Wang, Shie-Yuan
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Chen, Yo-Ru
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Li, Jun-Yi
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Hu, Hsien-Wen
;
Tsai, Jia-An
Tracking the rules matched by the packets of a flow when they traverse multiple switches in a network is very important and useful. In this paper, we design and implement a bandwidth-efficient In-Band Network Telemetry (INT) system that can track the rules matched by the packets of a flow in real time or in the past. We have evaluated the real performance of our system on a testbed composed of several hardware P4 switches. Our experimental results show that the system works correctly and its traffic reduction scheme can reduce the rate of generated INT reports by a factor of 39, 394, 2,055, or even up to 12,500, depending on the type of network states monitored and the threshold used to filter out less important INT reports.
Aggregating and disaggregating packets with various sizes of payload in P4 switches at 100 Gbps line rate
(2020-09-01)
Wang, Shie-Yuan
;
Li, Jun-Yi
;
Lin, Yi-Bing
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資訊工程學系
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Department of Computer Science
Aggregating multiple small packets into a large packet provides many advantages. For example, multiple small packets can share a single copy of common Ethernet/IP/UDP headers to reduce the percentage of network bandwidth spent on transmitting headers. In the past, packet aggregation and disaggregation were done by a server CPU or a switch CPU, resulting in low throughputs. In this paper, we design and implement packet aggregation and disaggregation functions in the packet processing pipelines of P4 switches. Our novel designs allow packets with various sizes of payload to be aggregated and disaggregated purely in the data plane of a P4 switch. Experimental results show that the achieved throughputs of our aggregation and disaggregation methods can reach 100 Gbps, which is the line rate of the used P4 switch.