Browsing by Author "Li, Yueh-Tai"

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Complexity-effective auditory compensation for digital hearing aids
(2008)
Kuo, Yu-Ting
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Lin, Tay-Jyi
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Chang, Wei-Han
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Li, Yueh-Tai
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Liu, Chih-Wei
This paper describes a complexity-effective design of auditory compensation, which is the most important building block in digital hearing aids. A multi-rate architecture and the filter bank design thereof are proposed to significantly reduce the data rates of the band-limited channels and thus the computational complexity. Several optimizations are discussed to further simplify the implementation of the dynamic range compressors in the multi-rate auditory compensation. In an 18-band 24-KHz digital hearing aid, 94% multiplications and additions are saved from a straightforward filter bank design. Moreover, the computation and memory requirements of the dynamic range compressor of each band are reduced to only 16% and 1% respectively.
Design and Implementation of Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids
(2010-07-01)
Kuo, Yu-Ting
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Lin, Tay-Jyi
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Li, Yueh-Tai
;
Liu, Chih-Wei
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電子工程學系及電子研究所
Due to well matching the frequency characteristics of human ears, ANSI S1.11 1/3-octave filter bank is popular in acoustic applications, such as acoustic analyzers and equalizers. It is also desirable in hearing aids because the famous hearing aid prescription formula, NAL-NL1, prescribes its gains at ANSI 1/3-octave frequencies. However, the high computation complexity limits its usage, in which the power consumption is a critical concern. To address this issue, a low-power design and implementation of ANSI S1.11 filter bank for digital hearing aids is present. We first develop the complexity-effective multirate FIR filter bank algorithm. And, a systematic coefficient design flow is elaborated for the proposed filter bank to minimize the order of the FIR filter thereof. In an 18-band digital hearing aid with 24-kHz sampling rate, the proposed algorithm saves about 96% of multiplications and additions, comparing that with a straightforward FIR filter bank. Moreover, various low-power VLSI design techniques are investigated in detail and applied on our design. The proposed complexity-effective ANSI S1.11 FIR filter bank has been implemented in the TSMC 0.13-mu m CMOS technology with an area-efficient architecture. The test chip consumes only 87 mu W, which is 30%-79% of that of the others available in the literature. The proposed low-power ANSI 1/3-octave bank makes itself being able to precisely apply the prescribed gains obtained by NAL-NL1 prescription formula for hearing-impaired people.
Design of ANSI S1.11 filter bank for digital hearing aids
(2007)
Kuo, Yu-Ting
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Lin, Tay-Jyi
;
Li, Yueh-Tai
;
Chang, Wei-Han
;
Liu, Chih-Wei
Existing digital hearing aids, to our knowledge, all exclude ANSI S1.11-compliant filter banks because of the high computational complexity. Most ANSI S1.11 designs are IIR-based and only applicable in applications where linear phase is not important. This paper presents an FIR-based ANSI S1.11 filter bank for digital hearing aids, which adopts a multi-rate architecture to reduce the data rates on the bandwidth-limited bands. A systematic way is also proposed to minimize the FIR orders thereof In an 18-band digital hearing aid with 24 kHz input sampling rate, the proposed design with linear phase has comparable computational complexity with IIR filter banks. Moreover, our design requires only 4% multiplications and additions of a straightforward FIR implementation.
Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids
(2008)
Kuo, Yu-Ting
;
Lin, Tay-Jyi
;
Li, Yueh-Tai
;
Lin, Chou-Kun
;
Liu, Chih-Wei
This paper presents a low-power filter bank design for digital hearing aids, which is compliant with the ANSI S1.11 standard. A multi-rate filtering algorithm and its coefficient design method are proposed, which reduce 94% multiplications. The power dissipation is further reduced by 31% and 35% with switch activity reduction and multi-VDD silicon implementation respectively. The design has been implemented using the TSMC 0.13 mu m CMOS technology and consumes only 79 mu W for 24KHz 18-band audio processing.
Ultra Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids
(2009)
Kuo, Yu-Ting
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Lin, Tay-Jyi
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Li, Yueh-Tai
;
Lin, Chou-Kun
;
Liu, Chih-Wei
This paper presents an ANSI S1.11-compliant filter bank for digital hearing aids, of which the power consumption is minimized through algorithmic, numerical and architectural optimizations. This filter bank has been implemented and fabricated using the TSMC 0.13 mu m CMOS technology. The transistor-level simulations show that the power dissipation is only 79 mu W for 24KHz & 18-band audio processing.