Browsing by Author "Liang, C. -P."

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Low-power VCO with phase-noise improvement in 0.18 mu m CMOS technology
(2010-09-30)
Liang, C. -P.
;
Huang, T. -J.
;
Rao, P. -Z.
;
Chung, S. -J.
;
傳播研究所
A low-power 5.25 GHz voltage-controlled oscillator ( VCO) with phase-noise improvement is designed in a 0.18 mu m CMOS 1P6M process. Owing to the use of a larger value of parallel capacitor, an additional harmonic-suppressed capacitor, and an appropriate bulk bias voltage of transistor, a good figure of merit of - 190 dBc/Hz can be achieved without extra chip area and CMOS process steps. The fabricated VCO operates from 5.12 to 5.36 GHz with a core power consumption of 1.9 mW and active chip area of 0.15 mm(2). The measured phase noise at 1 MHz offset is about - 119 dBc/Hz.