Browsing by Author "Liang, Ching-Piao"

Now showing 1 - 7 of 7

A 2.45/5.2 GHz Image Rejection Mixer With New Dual-Band Active Notch Filter
(2009-11-01)
Liang, Ching-Piao
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Rao, Pei-Zong
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Huang, Tien-Jien
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Chung, Shyh-Jong
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電信工程研究所
A 2.45/5.2 GHz dual-band Gilbert downconversion mixer with image rejection function is presented, which is implemented using the 0.18 mu m CMOS technology. The proposed differential dual-band image rejection circuitry is employed for the 2.45/5.2 GHz WLAN application to effectively diminish the dc power consumption and complexity of circuit design compared to the traditional Hartley or Weaver architectures. Moreover, the cross-connected pair consisted of NMOS and PMOS transistors in the proposed notch filter will further ameliorate the image rejection capability. The IC prototype achieves conversion gain of 10.5/11 dB, IIP3 of -4.9/-5.2 dBm for RF = 2.45/5.2 GHz and IF = 500 MHz while the image rejection ratio is better than 36/45 dB in the whole operation bandwidth.
A 24 GHz Low-power and High-gain Low-noise Amplifier Using 0.18 mu m CMOS Technology for FMCW Radar Applications
(2012)
Lin, Chun-Yi
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Lin, Ming-Wei
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Liang, Ching-Piao
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Chung, Shyh-Jong
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傳播研究所
In this paper, a low power and high gain low-noise amplifier (LNA) is presented for 24 GHz FMCW radar applications fabricated in a 0.18 mu m RF CMOS process. The proposed LNA is with the characteristics of the source inductive degeneration type, the current reuse technique, and the invariance of current density in CMOS process. The proposed LNA with a compact size has a gain of 18.95 dB and a noise figure of 5.8 dB, while consuming 11.3 mW. The measured input 1-dB compression point (IP1 dB) and an input third-order intercept point (IIP3) are -26 dBm and -16.5 dBm, respectively.
An Active Triple Band-notched Filter With Improved Q-Factor For UWB System
(2011)
Lin, Chun-Yi
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Li, Wei-Tsung
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Liang, Ching-Piao
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Chung, Shyh-Jong
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電信工程研究所
In this paper, an active triple band-notched filter with improved quality factor (Q-factor) in 0.18-mu m CMOS technology are presented. Due to the FCC\'s stringent power-emission limitation at the transmitter, the received signal power in the UWB system is smaller than those in IEEE 802.11 a/b/g wireless local area network (WLAN), and the worldwide interoperability for microwave access (WiMAX). To avoid the interferences such as the WLAN and WiMAX signals in the UWB passband simultaneously, the proposed band-notched filter can be adopted to eliminate these interferences. Two techniques are introduced to enhance the ability of outband rejection. A cascode-grounded active inductor circuit topology is employed, which is composed of a feedback resistor to improve the quality factor (Q-factor) of the active band-notched filter. With an extra parallel capacitor, the rejection of notch band also is improved obviously. The measured 23/24/31 dB maximum rejections at 2.4/3.5/4.9 GHz while consuming a dc power of 13.5 mW at 1.8-V power supply.
An Ultra-Wideband High-Linearity CMOS Mixer With New Wideband Active Baluns
(2009-09-01)
Rao, Pei-Zong
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Chang, Tang-Yuan
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Liang, Ching-Piao
;
Chung, Shyh-Jong
;
電信工程研究所
A 2-11-GHz high linearity CMOS down-conversion mixer with wideband active baluns using 0.18-mu m CMOS technology is demonstrated in this paper. The mixer employs a folded cascode Gilbert cell topology and on-chip broadband active baluns. The folded cascode approach is adopted to increase the output swing, and the linearity is enhanced by a harmonic distortion canceling technique derived from the harmonic balance analysis. The proposed configuration shows the highest HP(3) and IP(1 dB), and exhibits more compact size than most published studies. A broadband active balun is used to generate wideband differential signals, together with the derivation of a closed-form expression for the phase imbalance. This single-ended wideband mixer has the conversion gain of 6.9 +/- 1.5 dB, input 1-dB compression point (IP(1 dB)) of - 3.5 dBm, single-sideband noise figure of 15.5 dB, and third-order input intercept point (HP(3)) of 6.5 dBm under the power consumption of 25.7 mW from a 1.8-V power supply. The chip area is 0.85 x 0.57 mm(2).
Analysis and Design of Triple-band Input Matching for CMOS Low-noise Amplifier
(2012)
Lin, Chun-Yi
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Liang, Ching-Piao
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Rao, Pei-Zong
;
Chung, Shyh-Jong
;
傳播研究所
This paper presents the analysis and design of a triple-band low-noise amplifier (LNA) fabricated in a 0.18 mu m CMOS process. The triple-band operation is achieved by adding a switch component in a dual-band input network of an LNA, so that it can function at 2.5, 3.5, and 5.2 GHz. The proposed method can effectively decrease the chip area as compared to conventional designs. In addition, based on the design procedures provided in this paper, the component values of the triple-band input network can be accurately calculated to reduce the complication of the circuit design.
Analysis and Design of Two Low-Power Ultra-Wideband CMOS Low-Noise Amplifiers With Out-Band Rejection
(2010-02-01)
Liang, Ching-Piao
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Rao, Pei-Zong
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Huang, Tian-Jian
;
Chung, Shyh-Jong
;
電信工程研究所
Two 3-5-GHz low-power ultra-wideband (UWB) low-noise amplifiers (LNAs) with out-band rejection function using 0.18-mu m CMOS technology are presented. Due to the Federal Communications Commission's stringent power-emission limitation at the transmitter, the received signal power in the UWB system is smaller than those of the close narrowband interferers such as the IEEE 802.11 a/b/g wireless local area network, and the 1.8-GHz digital cellular service/global system for mobile communications. Therefore, we proposed a wideband input network with out-band rejection capability to suppress the out-band properties for our first UWB LNA. Moreover, a feedback structure and dual-band notch filter with low-power active inductors will further attenuate the out-band interferers without deteriorating the input matching bandwidth in the second UWB LNA. The 55/48/45 dB maximum rejections at 1.8/2.4/5.2 GHz, a power gain of 15 dB, and 3.5-dB minimum noise figure can be measured while consuming a dc power of only 5 mW.
Compact composite noise-reduction LNA for UWB WPAN and WBAN applications
(2018-05-23)
Lin, Chun-Yi
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Liang, Ching-Piao
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Tarng, Jenn-Hwan
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Chung, Shyh-Jong
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電信工程研究所
An ultra-wideband (UWB) low-noise amplifier (LNA) implemented using 180nm complementary metal-oxide-semiconductor technology is presented for wireless personal area network (WPAN) and wireless body area network (WBAN). Increasing the resistance of the substrate resistor R-B reduces the noise factor. When additional substrate resistors and a composite feedback topology are employed, the proposed LNA can achieve both a 1.4dB reduction of the noise figure (NF) and a 4dB enhancement in power gain (PG). Over the operating frequency range from 3.1 to 4.8GHz, the LNA achieves a maximum PG of 14.5dB, a minimum NF of 1.5dB, and an input return loss of <10dB. The measured current consumption is 3mA with a 1.5V supply voltage. The active chip area is 0.008mm(2). The proposed 3.1-4.8GHz LNA has a superior NF, smaller active area, and the lowest dc power consumption compared with devices reported in the literature.