Browsing by Author "Liang, Chung-Yu"

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A novel self-aligned etch-stopper structure with lower photo leakage for AMLCD and sensor applications
(2006-12-01)
Liang, Chung-Yu
;
Gan, Feng-Yuan
;
Liu, Po-Tsun
;
Yeh, F. S.
;
Chen, Stephen Hsin-Li
In this letter, the authors introduce a novel self-aligned etch-stopper sidewall-contact hydrogenated amorphous silicon (a-Si: H) thin-film transistor (ESSC-TFT), which reduces the photo leakage current by more than one order of magnitude and increases the ON-OFF ratio to seven orders of magnitude under back light illumination. Such a TFT will enable high-resolution and high-brightness liquid-crystal displays (LCDs) for next-generation TV, monitor, notebook, and mobile-phone applications. This ESSC-TFT design reduces the volume of a-Si film in which the active region can totally be shielded by the gate metal resulting in the prevention from direct back light illumination. With the sidewall contact, the hole current is reduced due to the smaller contact area between drain/source and a-Si layer. As well as the source, drain parasitic intrinsic resistance of a-Si can be also lessened by the ESSC-TFT structure. Although the defects between etched a-Si and n(+) a-Si film may degrade the ON current, the ESSC-TFT still exhibits higher ON-OFF ratio and lower leakage than the one in traditional etch-stopper (ES)-TFT structure. The ESSC-TFT structure can be used not only for TFT-LCD application but also for the applications that demand high ON-OFF ratio and low-leakage device, such as X-ray image sensor.
The Mechanisms of on/off currents for the Dual-Gate a-Si : H thin film transistors with various length sizes of indium-tin-oxide top gate
(2006-01-01)
Liang, Chung-Yu
;
Chang, T. C.
;
Po-Tsun, Liu
;
Gan, Feng-Yuan
;
Yeh, F. S.
Two types of dual-gate a-Si:H TFTs with four different sizes of transparent indium-tin-oxide (ITO) top gate length have been made for the static characteristics investigation. With various sizes of ITO top gate length, we clearly identify that the various on currents for the dual-gate TFTs with dual-gate driving are due to the high resistance of the parasitic intrinsic a-Si:H regions between the back electron channel and the source/drain contact. For the off state of the dual-gate TFTs, the Poole-Frenkel effect is also enhanced due to the back channel accumulation holes in the vicinity to the source/drain contact. Furthermore, we first observe that the dual-gate driving a-Si:H TFTs exhibit extremely low photo-leakage currents during a certain range of negative gate voltages under illumination. The high on-off current ratio under backside illumination makes the dual-gate TFTs the suitable devices as the switching elements in liquid crystal display (LCD) or other applications.