Browsing by Author "Liao, Chi-Sheng"

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New transient detection circuit for system-level ESD protection
(2008)
Yen, Cheng-Cheng
;
Liao, Chi-Sheng
;
Ker, Ming-Dou
;
電機學院
;
College of Electrical and Computer Engineering
A new on-chip transient detection circuit for system-level electrostatic discharge (ESD) protection is proposed. By including this new proposed on-chip transient detection circuit, a hardware/firmware solution cooperated with power-on reset circuit can be co-designed to fix the system-level ESD issues. The circuit performance to detect different positive and negative ESD-induced fast electrical transients has been investigated by HSPICE simulator and verified in silicon chip. The experimental results in a 0.18-mu m CMOS process have confirmed that the proposed on-chip transient detection circuit can detect fast electrical transients during system-level ESD zapping.
TRANSIENT DETECTION CIRCUIT
(2009-10-29)
Ker, Ming-Dou
;
Yen, Cheng-Cheng
;
Liao, Chi-Sheng
;
Chen, Tung-Yang
A transient detection circuit coupled between a first power line and a second power line and including a first control unit, a setting unit, and a voltage regulation unit. The first control unit generates a first control signal. The first control signal is at a first level when an electrostatic discharge (ESD) event occurs. The first control signal is at a second level when the ESD event does not occur. The setting unit sets a first node. The first node is set at the second level when the first control signal is at the first level. The voltage regulation unit regulates the first node. The voltage regulation unit regulates the level of the first node at the second level when the first control signal is at the second level.
TRANSIENT DETECTION CIRCUIT FOR ESD PROTECTION
(2009-07-23)
Ker, Ming-Dou
;
Yen, Cheng-Cheng
;
Liao, Chi-Sheng
;
Chen, Tung-Yang
A transient detection circuit including a detecting unit, a setting unit, and a memory unit. The transient detection circuit provides an information signal to an external instrument when an electrostatic discharge (ESD) event occurs. The detecting unit is coupled between a first power line and a second power line for detecting the ESD event. The setting unit sets a level of a first node according to the detection result. The memory unit controls the information signal according to the level of the first node. The information signal is at a first level when the ESD event occurs in the first power line.
Transient Detection Circuit for System-Level ESD Protection and Its On-Board Behavior with EMI/EMC Filters
(2008)
Ker, Ming-Dou
;
Liao, Chi-Sheng
;
Yen, Cheng-Cheng
;
電機學院
;
College of Electrical and Computer Engineering
A new on-chip transient detection circuit for system-level electrostatic discharge (ESD) protection is proposed. The circuit performance of detecting fast electrical transients has been verified in a 0.18-mu m CMOS integrated circuit (IC). The experimental results have confirmed that the proposed on-chip transient detection circuit can detect positive and negative fast electrical transients during system-level ESD zapping. Three board-level noise filtering networks have been investigated their enhancement on detection range of the proposed on-chip transient detection circuit. The chip-level solution can be further co-designed with the board-level solution in order to meet high system-level ESD specification.
TRANSIENT TO DIGITAL CONVERTERS
(2009-09-17)
Ker, Ming-Dou
;
Yen, Cheng-Cheng
;
Liao, Chi-Sheng
;
Chen, Tung-Yang
A digital converter including a first adjustment unit and a first transient detection unit. The first adjustment unit adjusts amplitude of an electrostatic discharge (ESD) pulse to generate a first adjustment signal when an ESD event occurs in a first power line and a second power line is at a complementary level. The first transient detection unit generates a first digital code according to the first adjustment signal.
Transient-to-Digital Converter for ESD Protection Design in Microelectronic Systems
(2008)
Ker, Ming-Dou
;
Yen, Cheng-Cheng
;
Liao, Chi-Sheng
;
Chen, Tung-Yang
;
Tsai, Chih-Chung
An on-chip transient-to-digital converter for system-level electrostatic discharge (ESD) protection is proposed. The proposed transient-to-digital converter is designed to detect fast electrical transients during the system-level ESD events. The output digital thermometer codes can correspond to different ESD voltages under system-level ESD tests. The experimental results in a 0.18-mu m CMOS integrated circuit (IC) with 3.3-V devices have confirmed the detection function and digital output codes.
Transient-to-Digital Converter for Protection Design in CMOS Integrated Circuits against Electrical Fast Transient
(2009)
Yen, Cheng-Cheng
;
Ker, Ming-Dou
;
Liao, Chi-Sheng
;
Chen, Tung-Yang
;
Tsai, Chih-Chung
An on-chip transient-to-digital converter for protection design against electrical fast transient (EFT) is proposed. The proposed transient-to-digital converter is designed to detect fast electrical transients under EFT tests. The output digital codes can correspond to different EFT voltages during the EFT-induced transient disturbances. The experimental results in a 0.18-mu m CMOS integrated circuit (IC) with 3.3-V devices have confirmed the detection function and digital output codes.