Browsing by Author "Liao, Hung-Tai"

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2xVDD-tolerant crystal oscillator circuit realized with 1xVDD CMOS devices without gate-oxide reliability issue
(2008)
Ker, Ming-Dou
;
Wang, Tzu-Ming
;
Liao, Hung-Tai
;
電機學院
;
College of Electrical and Computer Engineering
A new 2xVDD-tolerant crystal oscillator circuit realized with 1xVDD CMOS devices without suffering gate-oxide reliability issue is proposed, which is one of the key mixed-voltage I/O cells in a cell library. The proposed circuit is realized with only thin gate-oxide devices with floating n-well technique. The proposed 2xVDD-tolerant crystal oscillator circuit has been designed and verified in a 90-mn 1-V CMOS process to serve 1/2-V mixed-voltage interface applications.
Design of mixed-voltage crystal oscillator circuit in low-voltage CMOS technology
(2007)
Ker, Ming-Dou
;
Liao, Hung-Tai
;
電機學院
;
College of Electrical and Computer Engineering
In the nanometer-scale CMOS technology, the gate-oxide thickness has been scaled down to support a higher operating speed under a lower power supply (1xVDD). However, the board-level voltage levels could be still in a higher voltage levels (2xVDD, or even more) for compatible to some earlier interface specifications in a microelectronics system. The I/O interface circuits have been designed with consideration on the gate-oxide reliability in such mixed-voltage applications. In this work, a new mixed-voltage crystal oscillator circuit realized with low-vottage CMOS devices is proposed without suffering the gate-oxide reliability issue. The proposed mixed-voltage crystal oscillator circuit, which is one of the key I/O cells in a cell library, has been designed and verified in a 90-nm 1-V CMOS process to serve 1/1.8-V mixed-voltage interface applications.
Design of Mixed-Voltage-Tolerant Crystal Oscillator Circuit in Low-Voltage CMOS Technology
(2009-05-01)
Wang, Tzu-Ming
;
Ker, Ming-Dou
;
Liao, Hung-Tai
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
In the nanometer-scale CMOS technology, the gate-oxide thickness has been scaled down to provide higher operating speed with lower power supply voltage. However, regarding compatibility with the earlier defined standards or interface protocols of CMOS ICs in a microelectronics system, the chips fabricated in the advanced CMOS processes face the gate-oxide reliability problems in the interface circuits due to the voltage levels higher than normal supply voltage (1 x VDD) required by earlier applications. As a result, mixed-voltage I/O circuits realized with only thin-oxide devices had been designed with advantages of less fabrication cost and higher operating speed to communicate with the circuits at different voltage levels. In this paper, two new mixed-voltage-tolerant crystal oscillator circuits realized with low-voltage CMOS devices are proposed without suffering the gate-oxide reliability issues. The proposed mixed-voltage crystal oscillator circuits, which are one of the key I/O cells in a cell library, have been designed and verified in a 90-min 1-V CMOS process, to serve 1-V/2-V tolerant mixed-voltage interface applications.