Browsing by Author "Liau, Wen-Rong"

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A Model-Based-Random-Forest Framework for Predicting V-t Mean and Variance Based on Parallel I-d Measurement
(2018-10-01)
Lin, Chien-Hsueh
;
Tsai, Chih-Ying
;
Lee, Kao-Chi
;
Yu, Sung-Chu
;
Liau, Wen-Rong
To measure the variation of device V-t requires long test for conventional wafer acceptance test (WAT) test structures. This paper presents a framework that can efficiently and effectively obtain the mean and variance of V-t for a large number of designs under test (DUTs). The proposed framework applies the model-based random forest as its core model-fitting technique to learn a model that can predict the mean and variance of V-t based only on the combined I-d measured from parallel connected DUTs. The proposed framework can further minimize the total number of I-d measurement required for prediction models while limiting their accuracy loss. The experimental results based on the SPICE simulation of a UMC 28-nm technology demonstrate that the proposed model-fitting framework can achieve a more than 99% R -squared for predicting either V-t mean or V-t variance. Compared to conventional WAT test structures using binary search, our proposed framework can achieve a 120.3x speedup on overall test time for test structures with 800 DUTs.
Predicting Shot-Level SRAM Read/Write Margin Based on Measured Transistor Characteristics
(2016-02-01)
Bin, Shu-Yung
;
Lin, Shih-Feng
;
Cheng, Ya-Ching
;
Liau, Wen-Rong
;
Hou, Alex
An SRAM-array test structure provides the capability of directly measuring the characteristics of each transistor and the read/write metrics for each static random access memory (SRAM) cell in the array. However, the total test time of measuring the read/write metrics takes longer than that of measuring each transistor\'s characteristics. This paper presents a model-fitting framework to predict the average read/write metrics of the SRAM cells in a lithography shot using only the measured transistor characteristics. The proposed framework is validated through the measurement result of 4750 samples of a 128-bit SRAM-array test structure implemented in a United Microelectronics Corporation 28-nm process technology. The experimental results show that the learned models can achieve at least 97.77% R-square on fitting the shot-level read static noise margin, write margin, and read current based on 2375-sample testing data.
Predicting V-t Mean and Variance from Parallel I-d Measurement with Model-Fitting Technique
(2016)
Tsai, Chih-Ying
;
Lee, Kao-Chi
;
Lin, Chien-Hsueh
;
Yu, Sung-Chu
;
Liau, Wen-Rong
To measure the variation of device V-t requires long test for conventional WAT test structures. This paper presents a framework that can efficiently and effectively obtain the mean and variance of V-t for a large number of DUTs. The proposed framework applies the model-based random forest as its core model-fitting technique to learn a model that can predict the mean and variance of V-t based on only the combined I-d measured from parallel connected DUTs. The experimental results based on the SPICE simulation of a UMC 28nm technology demonstrate that the proposed model-fitting framework can achieve a more than 99% R-squared for predicting both of V-t mean and variance. Compared to conventional WAT test structures using binary search, our proposed framework can achieve 42.9X speedup in turn of the required iterations of I-d measurement per DUT.