Browsing by Author "Lin, Chien-Chen"
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Item type:Item, A 256b-Wordlength ReRAM-based TCAM with 1ns Search-Time and 14x Improvement in WordLength-EnergyEfficiency-Density Product using 2.5T1R cell(2016) ;Lin, Chien-Chen ;Hung, Jui-Yu ;Lin, Wen-Zhang ;Lo, Chieh-PuChiang, Yen-NingItem type:Item, A 3T1R Nonvolatile TCAM Using MLC ReRAM for Frequent-Off Instant-On Filters in IoT and Big-Data Processing(2017-06-01) ;Chang, Meng-Fan ;Lin, Chien-Chen ;Lee, Albert ;Chiang, Yen-NingKuo, Chia-ChenExisting nonvolatile ternary content-addressable-memory (nvTCAM) suffers from limited word-length (WDL), large write-energy (E-W) and search-energy (E-S), and large cell area (A). This paper develops a 3T1R nvTCAM cell using a single multiple-level cell (MLC)-resistive RAM (ReRAM) device to achieve long WDL, lower E-W and E-S, and reduced cell area. Two peripheral control schemes were developed, dual-replica-row self-timed and invalid-entry power consumption suppression (IEPCS), for the suppression of dc current in 3T1R nvTCAM cells in order to reduce E-S. Two versions of the IEPCS scheme were developed (basic and charge-recycle-controlled) to alter the tradeoff between area overhead and power consumption in the updating of invalid-bits. A 128 b x 64 b 3T1R nvTCAM macro was fabricated using back-end-of-line ReRAM under 90-nm CMOS process. The fabricated MLC-based 3T1R nvTCAM macro achieved sub-1-ns search-delay and sub-6-ns wake-up time with supply voltage of 1 V and WDL = 64 b.Item type:Item, A 3T1R Nonvolatile TCAM Using MLC ReRAM with Sub-1ns Search Time(2015-01-01) ;Chang, Meng-Fan ;Lin, Chien-Chen ;Lee, Albert ;Kuo, Chia-ChenYang, Geng-HauItem type:Item, A Predefined Bit-Plane Comparison Coding for Mobile Video Applications(2011-07-01) ;Lin, Chien-Chen ;Li, Yao ;Lee, Chen-Yi ;電子工程學系及電子研究所Department of Electronics Engineering and Institute of ElectronicsFor mobile video applications, the required storage and bandwidth of frame memory play crucial roles. Reducing the accesses and the size of frame memory can decrease area and cost, as well as power consumption. Current video-coding standards can reach high compression efficiency but demand large volumes of computations and storage requirements. Hence, it is hard for these coding standards to be embedded into an H. 264 decoder. In this brief, a novel embedded lossy compression scheme is proposed. With a compression ratio at 2, it compresses a 4 x 2 size block into 32 bit with peak-signal-to-noise-ratio loss of 1.27 similar to 3.94 dB compared with H.264. A pipelined architecture is also proposed to realize both the compressor and the decompressor in 2 cycles and 1 cycle, respectively. This cost-effective solution requires a gate count of 4.9 k and power consumption of 244 mu W in a 90-nm standard complementary metal-oxide-semiconductor process, making it very suitable for mobile video applications.Item type:Item, Energy- Efficient TCAM Search Engine Design Using Priority- Decision in Memory Technology(2017-03) ;Tsai, Hsiang-Jen ;Yang, Keng-Hao ;Peng, Yin-Chi ;Lin, Chien-ChenTsao, Ya-HanTernary content-addressable memory (TCAM)-based search engines generally need a priority encoder (PE) to select the highest priority match entry for resolving the multiple match problem due to the don\'t care (X) features of TCAM. In contemporary network security, TCAM-based search engines are widely used in regular expression matching across multiple packets to protect against attacks, such as by viruses and spam. However, the use of PE results in increased energy consumption for pattern updates and search operations. Instead of using PEs to determine the match, our solution is a three-phase search operation that utilizes the length information of the matched patterns to decide the longest pattern match data. This paper proposes a promising memory technology called priority-decision in memory (PDM), which eliminates the need for PEs and removes restrictions on ordering, implying that patterns can be stored in an arbitrary order without sorting their lengths. Moreover, we present a sequential input-state (SIS) scheme to disable the mass of redundant search operations in state segments on the basis of an analysis distribution of hex signatures in a virus database. Experimental results demonstrate that the PDM-based technology can improve update energy consumption of nonvolatile TCAM (nvTCAM) search engines by 36%-67%, because most of the energy in these search engines is used to reorder. By adopting the SIS-based method to avoid unnecessary search operations in a TCAM array, the search energy reduction is around 64% of nvTCAM search engines.Item type:Item, Energy-Efficient Non-Volatile TCAM Search Engine Design Using Priority-Decision in Memory Technology for DPI(2015) ;Tsai, Hsiang-Jen ;Yang, Keng-Hao ;Peng, Yin-Chi ;Lin, Chien-ChenTsao, Ya-HanTCAM-based search engines are widely used in regular expression matching across multiple packets. However, the use of priority encoder results in increased energy consumption of pattern updates and search operations. This work, proposes a promising memory technology, called Priority-Decision in Memory (PDM), which eliminates the need for priority encoders and removes restrictions on ordering, meaning that patterns can be stored in an arbitrary order without sorting their lengths. Moreover, we present a Sequential Input-State Search (SIS) scheme to disable the mass of redundant search operations in state segments, based on the analysis distribution of hex signatures in a virus database. Experimental results demonstrate that PDM-based technology can improve update energy consumption of nvTCAM search engines by 36%similar to 67% because most of the energy in the latter is used to reorder. By adopting the SIS-based method to avoid unnecessarily search operations in a TCAM array, the search energy reduction is around 64% of nvTCAM search engines.