Browsing by Author "Lin, Dong"

Now showing 1 - 2 of 2

Enhanced stability of thin film transistors with double-stacked amorphous IWO/IWO:N channel layer
(2018-06-01)
Lin, Dong
;
Pi, Shubin
;
Yang, Jianwen
;
Tiwari, Nidhi
;
Ren, Jinhua
In this work, bottom-gate top-contact thin film transistors with double stacked amorphous IWO/ IWO:N channel layer were fabricated. Herein, amorphous IWO and N-doped IWO were deposited as front and back channel layers, respectively, by radio-frequency magnetron sputtering. The electrical characteristics of the bi-layer-channel thin film transistors (TFTs) were examined and compared with those of single-layer-channel (i.e., amorphous IWO or IWO:N) TFTs. It was demonstrated to exhibit a high mobility of 27.2 cm(2)V(-1 )s(-1) and an on/off current ratio of 10(7).Compared to the single peers, bi-layer a-IWO/IWO:N TFTs showed smaller hysteresis and higher stability under negative bias stress and negative bias temperature stress. The enhanced performance could be attributed to its unique double-stacked channel configuration, which successfully combined the merits of the TFTs with IWO and IWO:N channels. The underlying IWO thin film provided percolation paths for electron transport, meanwhile, the top IWO:N layer reduced the bulk trap densities. In addition, the IWO channel/gate insulator interface had reduced defects, and IWO:N back channel surface was insensitive to the ambient atmosphere. Overall, the proposed bi-layer a-IWO/IWO:N TFTs show potential for practical applications due to its possibly long-term serviceability.
The Influence of Annealing Temperature on Amorphous Indium-Zinc-Tungsten Oxide Thin-Film Transistors
(2018-03-21)
Fu, Ruofan
;
Yang, Jianwen
;
Chang, Wei-Chiao
;
Chang, Wei-Cheng
;
Chang, Chien-Min
In this paper, the influence of annealing temperature on amorphous indium-zinc-tungsten-oxide (a-IZWO) thin-film transistors (TFTs) is investigated. As the annealing temperature increases, the IZWO films maintain an amorphous state, which is conducive to the uniformity of the TFT. The field effect mobility of the device increases as a function of annealing temperature and reaches 16.2cm(2)V(-1)s(-1) at 300 degrees C, along with an on/off current ratio of 1.6x10(8). Meanwhile, the corresponding positive bias stability is improved, as confirmed by the fact that the threshold voltage shift value reduces to 0.4V after being stressed for 1500s. This result can be ascribed to the decrease in electrons captured by the deep defects in a-IZWO TFTs.