Browsing by Author "Lin, Jing-Wei"

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Electrowetting on polymer dispersed liquid crystal
(2009-04-20)
Fan, Shih-Kang
;
Chiu, Cheng-Pu
;
Lin, Jing-Wei
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材料科學與工程學系奈米科技碩博班
;
Graduate Program of Nanotechnology , Department of Materials Science and Engineering
Polymer dispersed liquid crystal (PDLC) is used as a dielectric layer in electrowetting. By applying voltage between a liquid droplet and the electrode underlying PDLC, electrowetting occurs at the liquid/PDLC interface accompanied with electro-optic responses of the reoriented LC droplets embedded in PDLC. Two basic experiments investigating the electrowetting by sessile water droplets and the electro-optic effects through squeezed water droplets were design and performed. The basic functions of a liquid lens and droplet manipulations, including transporting, splitting, and merging, were demonstrated.
Reliability-Driven Power/Ground Routing for Analog ICs
(2012-01-01)
Lin, Jing-Wei
;
Ho, Tsung-Yi
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Jiang, Iris Hui-Ru
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電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
Electromigration and voltage drop (IR-drop) are two major reliability issues in modern IC design. Electromigration gradually creates permanently open or short circuits due to excessive current densities; IR-drop causes insufficient power supply, thus degrading performance or even inducing functional errors because of nonzero wire resistance. Both types of failure can be triggered by insufficient wire widths. Although expanding the wire width alleviates electromigration and IR-drop, unlimited expansion not only increases the routing cost, but may also be infeasible due to the limited routing resource. In addition, electromigration and IR-drop manifest mainly in the power/ground (P/G) network. Therefore, taking wire widths into consideration is desirable to prevent electromigration and IR-drop at P/G routing. Unlike mature digital IC designs, P/G routing in analog ICs has not yet been well studied. In a conventional design, analog designers manually route P/G networks by implementing greedy strategies. However, the growing scale of analog ICs renders manual routing inefficient, and the greedy strategies may be ineffective when electromigration and IR-drop are considered. This study distances itself from conventional manual design and proposes an automatic analog P/G router that considers electromigration and IR-drops. First, employing transportation formulation, this article constructs an electromigration-aware rectilinear Steiner tree with the minimum routing cost. Second, without changing the solution quality, wires are bundled to release routing space for enhancing routability and relaxing congestion. A wire width extension method is subsequently adopted to reduce wire resistance for IR-drop safety. Compared with high-tech designs, the proposed approach achieves equally optimal solutions for electromigration avoidance, with superior efficiencies. Furthermore, via industrial design, experimental results also show the effectiveness and efficiency of the proposed algorithm for electromigration prevention and IR-drop reduction.