Browsing by Author "Lin, Shu"

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A (21150,19050) GC-LDPC Decoder for NAND Flash Applications
(2019-03-01)
Liao, Yen-Chin
;
Lin, Chien
;
Chang, Hsie-Chia
;
Lin, Shu
;
電子工程學系及電子研究所
In this paper, a (21150, 19050) globally-coupled low-density parity check (GC-LDPC) code designed for NAND flash memories is presented. The proposed LDPC code comprises three disjoint subcodes which can be decoded independently. This highly structural parity check matrix contributes to efficient decoder implementation and flexible decoding flow control. Moreover, a two-phase local/global decoding procedure optimized for the proposed GC-LDPC code is introduced. Scenarios of collaborative decoding that leverages the special code structures are discussed. In the proposed decoder architecture, the pipelined processing elements with scheduling are employed to reduce the critical path and decoding latency as well. Implemented in UMC 65 nm process, the post-layout simulation shows a maximum decoding throughput of 432 Gb/s with the chip area 3.376 mm(2).
Generalized Globally-Coupled Low-Density Parity-Check Codes
(2018-01-01)
Liao, Yen-Chin
;
Chang, Hsie-Chia
;
Lin, Shu
;
交大名義發表
;
National Chiao Tung University
In this paper, two globally-coupled low-density parity check (GC-LDPC) code constructing methods are presented. The first is a Reed-Solomon-like GC-LDPC code that eases the design parameter searching in algebraic code constructions. The parameters such as the finite field, the associated prime factors, or the number of local codes can be more easily determined. The directly masking approach, the second proposed scheme, facilitates flexible structure designs of the parity check matrices. The two approaches can be regarded as generalizations of the original GC-LDPC codes. The design examples and the simulation results show the feasibility of the proposed techniques. In addition to code constructions, some applications and usage scenarios of GC-LDPC codes are addressed as well.
Scalable Globally-Coupled Low-Density Parity Check Codes
(2018-01-01)
Liao, Yen-Chin
;
Chang, Hsie-Chia
;
Lin, Shu
;
交大名義發表
;
National Chiao Tung University
This paper presents a technique to scale up an LDPC code to any desired block length. Under certain constraints, the scaled LDPC code results in a special case of globally-coupled-LDPC code. The proposed scheme can construct globally-coupled-LDPC codes from any short LDPC codes. A design example targeting for NAND flash memory applications is addressed and simulated. The results show the feasibility of constructing a structural long LDPC code by scaling from a short code.