Browsing by Author "Lin, Ting-An"

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A 125 mu W, fully scalable MPEG-2 and H.264/AVC video decoder for mobile applications
(2007-01-01)
Liu, Tsu-Ming
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Lin, Ting-An
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Wang, Sheng-Zen
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Lee, Wen-Ping
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Yang, Jiun-Yan
A low-power dual-standard video decoder has been developed for mobile applications. It supports MPEG-2 SP@ML and H.264/AVC BL@L4 video decoding in a single chip and features a scalable architecture to reach area/power efficiency. This chip integrates diverse algorithms of MPEG-2 and H.264/AVC to reduce silicon area. Three low-power techniques are proposed. First, a domain-pipelined scalability (DPS) technique is used to optimize the pipelined structure according to the number of processing cycles. Second, bandwidth scalability is implemented via a line-pixel-lookahead (LPL) scheme to improve the external bandwidth and reduce the internal memory size, leading to 51% of memory power reduction compared to a conventional design. Third, low-power motion compensation and deblocking filter are designed to reduce the operating frequency without degrading system performance. A test chip is fabricated in a 0.18 mu m one-poly six=metal CMOS technology with an area of 15.21 mm(2). For mobile applications, H.264/AVC and MPEG-2 video decoding of quarter-common intermediate format (QCIF) sequences at 15 frames per second are achieved at 1.15 MHz clock frequency with power dissipation of 125 mu W and 108 mu W, respectively, at 1 V supply voltage.
A low-power dual-mode video decoder for mobile applications
(2006-08-01)
Liu, Tsu-Ming
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Lin, Ting-An
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Wang, Sheng-Zen
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Lee, Chen-Yi
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電子工程學系及電子研究所
The objective of this article is to highlight design challenges for low-power and dual-video standard requirements, especially in mobile applications. Due to the advent of the newly announced H.264, a generic problem of standard incompatibility has appeared between H.264 and prevalent MPEG-x video standards, which must be resolved on both algorithmic and architectural levels. Furthermore, several low-power techniques targeted at achieving lower memory requirements and processing cycles are also described and discussed.
An 865-mu W H.264/AVC video decoder for mobile applications
(2005)
Liu, Tsu-Ming
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Lin, Ting-An
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Wang, Sheng-Zen
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Lee, Wen-Ping
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Hou, Kang-Cheng
A low power H.264/AVC video decoder LSI for mobile applications is presented. Video decoding of quarter-common intermediate format (QCIF) sequence at 30 frames per second is achieved at 1.2MHz clock frequency and requires about 865pW at 1.8-V supply voltage. Moreover, CIF, SD and HD sequence format are also supported. The decoder architecture is based on 4x4 sub-block level pipelining that achieves better buffer allocation and decoding throughput. In addition, several modules are designed with new features to improve overall system throughput (up to 260,000 MacroBlock/sec). The proposed solution integrates 456-k logic gates with 161Kb of embedded SRAM in 0.18-mu m single-poly six-metal CMOS process with area of 11.3mm(2).
Design of a 125 mu W, fully-scalable MPEG-2 and H.264/AVC video decoder for mobile applications
(2006)
Liu, Tsu-Ming
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Chung, Ching-Che
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Lee, Chen-Yi
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Lin, Ting-An
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Wang, Sheng-Zen
A design of MPEG-2 and H.264/AVC video decoder is demonstrated in a 0.18 mu m CMOS [1]. The key design issues involved in this advanced IC are discussed, including improving area and power efficiency. Power dissipation is greatly lowered through the architectural exploration. Measurement results show that MPEG-2 and H.264/AVC real-time decoding of QCIF@15fps are achieved at 1.15MHz with power dissipation of 108 mu W and 125 mu W respectively at 1V supply voltage.
SUPPORTIVE ATTENTION IN END-TO-END MEMORY NETWORKS
(2018-01-01)
Chien, Jen-Tzung
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Lin, Ting-An
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電機工程學系
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Department of Electrical and Computer Engineering
Attention over natural language aims to spotlight on the meaningful region with representative keywords which can extract desirable meanings to accomplish a task of interest. The attention parameter is a latent variable which was indirectly estimated by minimizing the classification loss. For the task of question answering (QA), the classification loss may not sufficiently reflect the target answer. This paper proposes a direct solution which attends the meaningful region by minimizing the reconstruction loss due to auxiliary or supporting data which are available in different scenarios. In particular, minimizing the classification and reconstruction losses are carried out under the end-to-end memory network so that the memory-augmented question answering is realized. Such a supportive attention is implemented as a sequence-tosequence model which reconstructs the supporting sentence to assure the translation invariance. The merit of this method is sufficiently demonstrated for sequential learning by using the bAbI QA and dialog tasks.