Browsing by Author "Lin, Wan-Yen"

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New Design of Transient-Noise Detection Circuit with SCR Device for System-Level ESD Protection
(2012)
Ker, Ming-Dou
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Lin, Wan-Yen
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電子工程學系及電子研究所
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Department of Electronics Engineering and Institute of Electronics
A new SCR-based transient detection circuit for on-chip protection design against system-level ESD-induced electrical transient disturbance is proposed and verified in silicon chip. The experimental results in a 0.18-mu m CMOS process have confirmed that the new proposed detection circuit can successfully memorize the occurrence of system-level ESD-induced electrical transient events. The detection output can be cooperated with firmware operation to automatically execute system recovery procedure, therefore the immunity of microelectronic systems against system-level ESD test can be effectively improved.
On-chip detection circuit for protection design in display panel against electrical fast transient (EFT) disturbance
(2011)
Yen, Cheng-Cheng
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Ker, Ming-Dou
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Lin, Wan-Yen
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Yang, Che-Ming
;
Chen, Shih-Fan
A new on-chip detection circuit is proposed for electrical fast transient (EFT) protection design in a display system. For microelectronic products, electrical transient disturbances often cause upset or frozen states under the IEC test standard. The output signal of the proposed detection circuit can be used as a firmware index to execute system automatic recovery operations and to release the EFT-induced locked states in display panels. The circuit function to detect positive or negative electrical transients has been investigated in HSPICE simulation and verified in silicon chip. The experimental results have confirmed successful circuit performance under EFT tests. With hardware/firmware co-design, the immunity of a display system against electrical transient disturbance has been significantly improved.
Protection Design Against System-Level ESD Transient Disturbance on Display Panels
(2010-01-01)
Ker, Ming-Dou
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Lin, Wan-Yen
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Yen, Cheng-Cheng
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Yang, Che-Ming
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Chen, Tung-Yang
A hardware/firmware system co-design has been proposed in this work to protect display electronic products against system-level electrostatic discharge (ESD) transient disturbance. By including transient detection circuit, the firmware can execute system recovery procedure to recover all electrical functions under system-level ESD tests. The transient detection circuit is designed to detect different positive and negative fast electrical transients and verified in a 0.13 mu m CMOS process. The experimental results have confirmed that the proposed hardware/firmware design can successfully improve the susceptibility of display products against system level ESD zapping.
SCR-based transient detection circuit for on-chip protection design against system-level electrical transient disturbance
(2014-01-01)
Ker, Ming-Dou
;
Lin, Wan-Yen
;
Yen, Cheng-Cheng
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A new silicon controlled rectifier (SCR)-based transient detection circuit for on-chip protection design against system-level electrical transient disturbance is proposed. The circuit function to detect positive or negative electrical transients during system-level electrostatic discharge (ESD) and electrical fast transient (EFT) tests has been verified in silicon chip. The experimental results in a 0.18-mu m CMOS process have confirmed that the new proposed detection circuit can successfully memorize the occurrence of system-level electrical transient disturbance events. The detection results can be cooperated with firmware design to execute system recovery procedures, therefore the immunity of microelectronic systems against system-level ESD or EFT tests can be effectively improved. (C) 2013 Elsevier Ltd. All rights reserved.