Browsing by Author "Lin, Xuan-Yu"

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Low-Cost Low-Power Droop-Voltage-Aware Delay-Fault-Prevention Designs for DVS Caches
(2015-01-01)
Chou, Pei-Yuan
;
Wu, I-Chen
;
Lin, Jai-Wei
;
Lin, Xuan-Yu
;
Chen, Tien-Fu
We propose to use a canary circuit with dynamic trip-point sensing scheme to replace ECC check bits and related circuits in conventional DVS caches for reducing area overhead and to enable deeper voltage scaling for reducing power consumption. With the canary circuit, a variable-cycle access controller can easily deal with an overlong delay without pre-allocating Vcc headroom for covering the droop voltage. Applying all the proposed delay-fault-prevention design techniques together can lead to a cost-effective and power-efficient DVS cache.
ULV-Turbo Cache for an Instantaneous Performance Boost on Asymmetric Architectures
(2017-12-01)
Wang, Po-Hao
;
Chien, Yung-Chen
;
Tsai, Shang-Jen
;
Lin, Xuan-Yu
;
Tanjung, Rizal
An asymmetric architecture is commonly used in modern embedded systems to reduce energy consumption. The systems tend to execute more applications in the energy-efficient core, which typically employs ultralow voltage (ULV) to save energy. However, caches become a reliability and performance barrier that limits the minimum operating voltage and blocks system performance in the ULV environment. The poor performance of an ultralow-voltage core causes most workload requirements to awaken and then execute on the host core, leading to high energy consumption. In this paper, we propose a ULV-Turbo cache based on a ULV-selective-ally 8T static random access memory (SRAM) that is able to perform reliable ultralow-voltage operation and provide the speedup function of SRAM rows ally. The system is able to speed up the ULV core instantaneously and execute more applications with the ULV-Turbo cache. In our system-wide evaluation based on a real attitude and heading reference system workload on an asymmetric wearable system, the ULV-Turbo cache reduces the energy consumption of the entire system by approximately 36%.