Browsing by Author "Lin, Y. S."

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Design of Complementary Tilt-gate TFETs with SiGe/Si and III-V Integrations Feasible for Ultra-low-power Applications
(2015)
Hsieh, E. R.
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Lin, Y. S.
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Zhao, Y. B.
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Liu, C. H.
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Chien, C. H.
A new concept of the structure design with an alignment between the maximum band-to-band tunneling rate and electric field has been proposed to enhance the performance of TFETs. It was found that the specific gate of TFET to form an obtuse shape can dramatically improve the on-current of TFET, with over 4 order improvement in comparison to planar ones. This complementary TFET (CTFET) was also demonstrated by SRAM as a benchmark, with SiGe/Si integrated with III-V on Si substrate. In order to increase WNM and RSNM of CTFET SRAM, a new scheme has been adopted, in which SRAM has been successfully demonstrated with operating bias down to 0.3V.
Investigation of Electrical Characteristics on 25-nm InGaAs Channel FinFET Using InAlAs Back Barrier and Al2O3 Gate Dielectric
(2017-01-01)
Lin, M. H.
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Lin, Y. C.
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Lin, Y. S.
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Sun, W. J.
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Chen, S. H.
We investigated an N-type III-V FinFET with a 25-nm In0.53Ga0.47As channel and a 300-nm In0.52Al0.48As barrier layer on an InP substrate. The In0.52Al0.48As barrier layer is used to suppress leakage current from the InP substrate and the 10-nm Al2O3 film deposited by atomic layer deposition (ALD) can be a robust gate dielectric to mitigate interface traps. The on to off current ratio is approximately three orders of magnitude, the subthreshold swing (SS) is 350 mV/dec, and the maximum driving current density is 130 mu A/mu m at V-G = 1.5 V for InGaAs FinFET with a fin width of 40 nm and gate length of 200 nm. (c) 2017 The Electrochemical Society. All rights reserved.
Localized Joule Heating As a Mask-Free Technique for the Local Synthesis of ZnO Nanowires on Silicon Nanodevices
(2011-11-01)
Chen, C. C.
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Lin, Y. S.
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Sang, C. H.
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Sheu, J. -T.
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材料科學與工程學系奈米科技碩博班
We report a mask-free technique for the local synthesis of ZnO nanowires (NWs) on polysilicon nanobelts and polysilicon NW devices. First, we used localized joule heating to generate a poly(methyl methacrylate) (PMMA) nanotemplate, allowing the rapid and self-aligned ablation of PMMA within a short period of time (ca. S mu s). Next, we used ion-beam sputtering to prepare an ultrathin Au film and a ZnO seed layer; a subsequent lift-off process left the seed layers selectively within the PMMA nanotemplate. Gold nanoparticles and ZnO NWs were formed selectively in the localized joule heating region.
Smart pantries for homes
(2006)
Hsu, C. F.
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Liao, H. Y. M.
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Hsiu, P. C.
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Lin, Y. S.
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Shih, C. S.
A smart pantry holds non-perishable household supplies and automates the purchasing and delivery of their replenishments. By relieving its user from the chore of keeping the home stocked of essentials, it provides convenience and peace of mind not only to elderly individuals but also busy people of all ages. This paper describes two alternative smart pantry designs and tradeoffs. Underlying methods and technologies used for their implementation are also described.
Surface roughness of sputtered ZnO films
(2006-09-01)
Lin, Y. S.
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Hsu, K. C.
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Huang, Y. M.
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光電工程學系
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Department of Photonics
ZnO films are grown on Si and glass substrates by radio-frequency (RF) magnetron sputtering. The crystalline structures are investigated by x- ray diffraction (XRD). Moreover, the roughness characteristics of the films are examined by atomic force microscopy (AFM) and field-emission scanning electron microscopy (FE-SEM). All films exhibit strong ( 002) preferential orientation. The influence of the RF power and target-to-substrate distance (D-ts) on the properties of ZnO is studied. Under the optimized conditions of the RF power and D-ts, root-mean-square (RMS) surface roughnesses of < 0.8 nm are achieved.