Browsing by Author "Lin, Yan-Liang"

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Design of 2xVDD-Tolerant I/O Buffer with 1xVDD CMOS Devices
(2009)
Ker, Ming-Dou
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Lin, Yan-Liang
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A new 2xVDD-tolerant I/O buffer realized with only 1xVDD devices has been proposed and verified in a 0.18-mu m CMOS process. With the dynamic source output technique and the new gate-controlled circuit, the new proposed I/O buffer can transmit and receive the signals with the voltage swing twice as high as the normal power supply voltage (VDD) without suffering gate-oxide reliability problem. The proposed 2xVDD-tolerant I/O circuit solution can be implemented in different nanoscale CMOS processes to meet the mixed-voltage interface applications in microelectronic systems.