Browsing by Author "Lin, Yu-Chun"

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10Gbps Decision Feedback Equalizer with Dynamic Lookahead Decision Loop
(2009)
Lin, Yu-Chun
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Shiue, Muh-Tian
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Jou, Shyh-Jye
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電子工程學系及電子研究所
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Department of Electronics Engineering and Institute of Electronics
Decision feedback equalizer (DFE) uses a feedback path to cancel post-cursor IS!, and this feedback path will also cause the limitation of its maximum throughput rate. This paper proposes a new lookahead method to break the feedback path for multi-gigabit DFE design. After lookahead computation, each paralleled sub-circuit has the same throughput rate as original one. Therefore, the total throughput rate is proportional to the parallelization factor. The computation complexity of the proposed architecture is lower than that of multiplexer-based lookahead DFE if the tap number of the feedback filter is large. It is shown that the new method saves 10% hardware complexity for an 8 taps feedback filter DFE and 98% hardware complexity for a 12 taps feedback filter DFE in comparison to a 10Gbps multiplexer-based lookahead DFE.
A 40Gb/s All-Digital Adaptive Noise-Suppression Feed-Forward Filter and Adaptive Decision Feedback Equalizer with 40 parallelisms for 2-PAM Systems
(2018-01-01)
Ng, Chee-Kit
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Lin, Yu-Chun
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Liu, Wei-Chang
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Wu, Chin-Feng
;
Lou, Shyh-Lye
A 40Gb/s all-digital adaptive noise-suppression feed-forward filter/equalizer (AFFE) and adaptive decision feedback equalizer (ADFE) for 2-level pulse amplitude modulation (2-PAM) systems is presented. Batch mode coefficients update (BMCU) unit together with coefficients-Iookahead scheme are proposed to achieve high parallelism architecture for ADFE. With these schemes, new extended incremental coefficients-Iookahead filter architecture is proposed to provide high throughput rate and to reduce hardware complexity of parallel ADFE. Besides, feed-forward noise-suppression architecture is proposed for AFFE to provide better signal-to-noise ratio (SNR). The equalizer operates at 1 GHz system clock with 40 parallelisms is implemented in 40nm CMOS technology with a core area 0.23mm(2). The measurement results verify the equalizer performance and the maximum throughput of 40Gb/s is achieved under 0.9V supply with 4.35pJ/bit energy efficiency.
A 50 Gb/s Adaptive ADFE with SNR Based Power Management for 2-PAM Systems
(2019-01-01)
Ng, Chee-Kit
;
Lin, Yu-Chun
;
Jou, Shyh-Tye
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
A 50Gbls all-digital adaptive noise-suppression (NS) feed-forward equalizer (AFFE) and adaptive decision feedback equalizer (ADFE) for 2-level pulse amplitude modulation (2-PAM) serial link systems with SNR based power management scheme is presented. Based on a parallel extended incremental coefficients-lookahead scheme (EICL), we propose a reconfigurable Dual Data paths Self-Lookahead Filter (DD-SLF) for ADFE. SNR-power management skill is adopted to adaptively adjust the hardware configuration in different channel environment and SNR to achieve optimum energy efficiency. The whole equalizer which operates at 1 GHz system clock rate with 50 parallelisms is implemented in 40nm CMOS technology with a core area 0.38mm(2). The equalizer with 50Gb/s throughput rate achieves 2.6pJ/bit energy efficiency under 0.81V supply measurement results.
A 50 Gb/s Adaptive Dual Data-Paths NS-EICL ADFE with 50 Parallelisms for 2-PAM Systems
(2019-01-01)
Ng, Chee-Kit
;
Chiu, Kang-Lun
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Lin, Yu-Chun
;
Jou, Shyh-Jye
;
電子工程學系及電子研究所
A 50Gb/s all-digital adaptive noise-suppression (NS) feed-forward equalizer (AFFE) and adaptive decision feedback equalizer (ADFE) for 2-level pulse amplitude modulation (2-PAM) serial link systems is presented. Based on a parallel extended incremental coefficients-lookahead scheme (EICL), we propose a Dual Data-paths Self-Lookahead Filter (DD-SLF) for ADFE. DD-SLF architecture has better energy efficiency and hardware area than an original SLF architecture due to the number of delay elements in the feedback loop is reduced. Furthermore, gated clock technique with the design idea of register file architecture is used to replace the pipelined delay elements to save power. The whole equalizer which operates at 1GHz system clock rate with 50 parallelisms is implemented in 40nm CMOS technology with a 0.38mm(2) core area. The equalizer with 50Gb/s throughput rate achieves 2.6pJ/bit energy efficiency under 0.81V supply measurement results.
A supramolecular hydrogel self-assembled from pentafluorobenzyl-dipeptide
(2015-01-01)
Hsu, Shu-Min
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Chang, Jui-Wen
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Wu, Fang-Yi
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Lin, Yu-Chun
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Lai, Tsung-Sheng
We report a new aromatic-capped peptide amphiphile which is able to form a supramolecular hydrogel under neutral pH. This hydrogel can also be obtained by enzymatic transformation from the hydrogelator precursor. The newly discovered hydrogel has excellent biocompatibility for four different cell lines, thus making it a potentially useful scaffolding material for biomedical applications.
Concurrent digital Adaptive Decision Feedback Equalizer for 10GBase-LX4 Ethernet system
(2007)
Lin, Chi-Shiung
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Lin, Yu-Chun
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Jou, Shyh-Jye
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Shiou, Mun-Tian
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電機工程學系
An all digital 3.5Gbps blind Adaptive Decision Feedback Equalizer (ADFE) is designed for 10GBase-LX4 IEEE 802.3ae standard. It uses 5 parallel equalization blocks each with 6 taps and 4 taps for each Feed-Forward Equalizer (FFE) and Feed-Back Equalizer (FBE). This concurrent ADFE has core area of 0.864 x 0.864 mm(2) with operation up to 3.5 Gbps using 1.2-V supply in a 0.13 um CMOS process. It dissipates 94 mW when working at 3.125 Gbps.
Full-Digital High Throughput Design of Adaptive Decision Feedback Equalizers Using Coefficient-Lookahead
(2015-01-01)
He, Wen-Quan
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Lin, Yu-Chun
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Hung, Jui-Yi
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Jou, Shyh-Jye
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電子工程學系及電子研究所
This paper proposes a novel full-digital architecture of adaptive decision feedback equalizer (ADFE) for wireline 2-level pulse amplitude modulation (2-PAM) systems. It is well known that the feedback loop in DFE limits the greatest achievable speed. The proposed scheme begins by deriving coefficient-lookahead concept based on a reasonable assumption, whereupon a preliminary architecture can be implemented using the formula derived. Furthermore, according to channel characteristics, the formula derived can be simplified to break the feedback loop. Finally, the architecture can be easily pipelined and processed in parallel to achieve high throughput rate. Thus, the proposed design is a high speed design with parallel and pipeline architecture. This paper used a TSMC 40 nm CMOS process to fabricate the proposed design with a build-in self-test (BIST) circuit. The measured results show that the throughput rate is up to 16 Gbps.
Intramolecular Interactions of a Phenyl/Perfluorophenyl Pair in the Formation of Supramolecular Nanofibers and Hydrogels
(2014-02-10)
Hsu, Shu-Min
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Lin, Yu-Chun
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Chang, Jui-Wen
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Liu, Yu-Hao
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Lin, Hsin-Chieh
A new system for the incorporation of a phenyl/perfluorophenyl pair in the structure of a peptide hydrogelator was developed. The strategy is based on the idea that the integration of an end-capped perfluorophenyl group and a phenylalanine with a phenyl moiety in the side chain forms an intramolecular phenyl/perfluorophenyl pair, which can be used to promote the formation of the supramolecular nanofibers and hydrogels. This work illustrates the importance of structure-hydrogelation relationship and provides new insights into the design of self-assembly nanobiomaterials.
Self-assembly and hydrogelation from multicomponent coassembly of pentafluorobenzyl-phenylalanine and pentafluorobenzyl-diphenylalanine
(2015-01-01)
Hsu, Shu-Min
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Wu, Fang-Yi
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Lai, Tsung-Sheng
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Lin, Yu-Chun
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Lin, Hsin-Chieh
To screen the possibility of forming self-assembled hydrogels under physiological pH, various molar ratios of the hydrogelators based on pentafluorobenzyl-phenylalanine (PFB-F) and pentafluorobenzyl-diphenylalanine (PFB-FF) were studied. The equimolar ratio of PFB-F and PFB-FF formed coassembled nanofibers and a self-supporting hydrogel at the physiological pH of 7.4. The spectroscopic characterization of the blend gel indicates that pi-pi interactions and hydrogen-bonding interactions are the major driving forces behind the coassembly. In addition, we also prove that the blend hydrogel is biocompatible, thus making it a scaffolding material for biomedical applications. In this work, the utility of two distinct hydrogelators to promote coassembly under physiological condition expands the repertoire of noncovalent interactions that can be used in the development of sophisticated noncovalent biomaterials.