Browsing by Author "Lin Yueh-Chin"
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Item type:Item, Dielectric structure, transistor and manufacturing method thereof(2012-04-05) ;Chang Edward-YiLin Yueh-ChinThe present invention discloses a dielectric structure, a transistor and a manufacturing method thereof with praseodymium oxide. The transistor with praseodymium oxide comprises at least a III-V substrate, a gate dielectric layer and a gate. The gate dielectric layer is disposed on the III-V substrate, and the gate is disposed on the gate dielectric layer, and the gate dielectric layer is praseodymium oxide (PrxOy), which has a high dielectric constant and a high band gap. By using the praseodymium oxide (Pr6O11) as the material of the gate dielectric layer in the present invention, the leakage current could be inhibited, and the equivalent oxide thickness (EOT) of the device with the III-V substrate could be further lowered.Item type:Item, ENHANCEMENT-MODE HIGH-ELECTRON-MOBILITY TRANSISTOR AND THE MANUFACTURING METHOD THEREOF(2012-09-20) ;CHANG EDWARD YI ;Chang Chia-HuaLin Yueh-ChinThis invention discloses an enhancement-mode high-electron-mobility transistor and the manufacturing method thereof. The transistor comprises an epitaxial buffer layer on a substrate, a source and drain formed in the buffer layer, a PN-junction stack formed on the buffer layer and located between the source and drain, and a gate formed on the PN-junction stack, wherein the PN-junction stack is composed of alternating layers of a P-type semiconductor and an N-type semiconductor.Item type:Item, III-V metal-oxide-semiconductor device(2013-08-27) ;Chang Edward YiLin Yueh-ChinA hafnium oxide layer, between a III-V semiconductor layer and a metal oxide layer is used to prevent interaction between the III-V semiconductor layer and the metal oxide layer.Item type:Item, Method for fabricating a GaN-based thin film transistor(2013-04-16) ;Chang Yi ;Chang Chia-HuaLin Yueh-ChinA method for fabricating a GaN-based thin film transistor includes: forming a semiconductor epitaxial layer on a substrate, the semiconductor epitaxial layer having a n-type GaN-based semiconductor material; forming an insulating layer on the semiconductor epitaxial layer; forming an ion implanting mask on the insulating layer, the ion implanting mask having an opening to partially expose the insulating layer; ion-implanting a p-type impurity through the opening and the insulating layer to form a p-doped region in the n-type GaN-based semiconductor material, followed by removing the insulating layer and the ion implanting mask; forming a dielectric layer on the semiconductor epitaxial layer; partially removing the dielectric layer; forming source and drain electrodes; and forming a gate electrode.Item type:Item, METHOD FOR FABRICATING A GaN-BASED THIN FILM TRANSISTOR(2012-05-17) ;Chang Yi ;Chang Chia-HuaLin Yueh-ChinA method for fabricating a GaN-based thin film transistor includes: forming a semiconductor epitaxial layer on a substrate, the semiconductor epitaxial layer having a n-type GaN-based semiconductor material; forming an insulating layer on the semiconductor epitaxial layer; forming an ion implanting mask on the insulating layer, the ion implanting mask having an opening to partially expose the insulating layer; ion-implanting a p-type impurity through the opening and the insulating layer to form a p-doped region in the n-type GaN-based semiconductor material, followed by removing the insulating layer and the ion implanting mask; forming a dielectric layer on the semiconductor epitaxial layer; partially removing the dielectric layer; forming source and drain electrodes; and forming a gate electrode.Item type:Item, Method for forming T-shaped gate structure(2013-05-07) ;Chang Edward Yi ;Huang Lu-Che ;Chang Chia-Hua ;Lin Yueh-ChinChieng Wei-HuaA method for forming a T-shaped gate is provided. The method includes providing a substrate. Then, a photoresist structure is formed over the substrate. The photoresist structure includes two development rates. Next, a mask with an opening is formed over the photoresist structure to pattern the photoresist structure. An angle exposure is applied to the photoresist structure, and the exposed photoresist structure is developed to form a T-shaped notch. A width of the T-shaped notch is gradually reduced from a top portion thereof to a bottom portion to expose a surface of the substrate. Then, a gate metal is deposited in the T-shaped notch. Thereafter, the patterned photoresist structure is removed to form the T-shaped gate.Item type:Item, Semiconductor device(2014-05-27) ;Chang Yi ;Chang Chia-Hua ;Lin Yueh-Chin ;Chen Yu-KongShie Ting-EnA semiconductor device includes a main body made of a GaN-based semiconductor material, and at least one electrode structure. The electrode structure includes an ohmic contact layer that is formed on the main body, a buffer layer that is formed on the ohmic contact layer opposite to the main body, and a circuit layer that is made of a copper-based material and that is formed on the buffer layer opposite to the ohmic contact layer. The ohmic contact layer is made of a material selected from titanium, aluminum, nickel, and alloys thereof. The buffer layer is made of a material different from the material of the ohmic contact layer and selected from titanium, tungsten, titanium nitride, tungsten nitride, and combinations thereof.Item type:Item, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF(2013-06-20) ;Chang Edward Yi. ;Lin Yueh-Chin ;Chang Chia-HuaTrinh Hai-DangThe present invention relates to a semiconductor device and a manufacturing method thereof. The semiconductor device includes: a III-V semiconductor layer; an aluminum oxide layer formed on the III-V semiconductor layer; and a lanthanide oxide layer formed on the aluminum oxide layer. The method of manufacturing a semiconductor device includes: forming an aluminum oxide layer between a III-V semiconductor layer and a lanthanide oxide layer so as to prevent an inter-reaction of atoms between the III-V semiconductor layer and the lanthanide oxide layer.Item type:Item, Structure of high electron mobility transistor growth on Si substrate and the method thereof(2014-08-05) ;Yi Chang Edward ;Tang Shih-HsuanLin Yueh-ChinA structure of high electron mobility transistor growth on Si substrate and the method thereof, in particular used for the semiconductor device manufacturing in the semiconductor industry. The UHVCVD system was used in the related invention to grow a Ge film on Si substrate then grow the high electron mobility transistor on the Ge film for the reduction of buffer layer thickness and cost. The function of the Ge film is preventing the formation of silicon oxide when growing III-V MHEMT structure in MOCVD system on Si substrate. The reason of using MHEMT in the invention is that the metamorphic buffer layer in MHEMT structure could block the penetration of dislocation which is formed because of the very large lattice mismatch (4.2%) between Ge and Si substrate.Item type:Item, STRUCTURE OF HIGH ELECTRON MOBILITY TRANSISTOR GROWTH ON SI SUBSTRATE AND THE METHOD THEREOF(2013-02-28) ;YI CHANG Edward ;Tang Shih-HsuanLin Yueh-ChinA structure of high electron mobility transistor growth on Si substrate and the method thereof, in particular used for the semiconductor device manufacturing in the semiconductor industry. The UHVCVD system was used in the related invention to grow a Ge film on Si substrate then grow the high electron mobility transistor on the Ge film for the reduction of buffer layer thickness and cost. The function of the Ge film is preventing the formation of silicon oxide when growing III-V MHEMT structure in MOCVD system on Si substrate. The reason of using MHEMT in the invention is that the metamorphic buffer layer in MHEMT structure could block the penetration of dislocation which is formed because of the very large lattice mismatch (4.2%) between Ge and Si substrate.