Browsing by Author "Liu, Han-Wen"

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A Novel Coaxial-Structured Amorphous-Silicon p-i-n Solar Cell With Al-Doped ZnO Nanowires
(2011-07-01)
Li, Hung-Hsien
;
Yang, Po-Yu
;
Chiou, Si-Ming
;
Liu, Han-Wen
;
Cheng, Huang-Chung
A novel coaxial-structured amorphous-silicon (a-Si) p-i-n solar cell with 1-mu m-long low-temperature hydrothermally synthesized Al-doped-ZnO (AZO) nanowires was demonstrated for the first time. The conversion efficiency. increased from 3.92% to 4.27% when the intrinsic a-Si thickness was increased from 25 to 150 nm and then decreased to 3.66% when the intrinsic layer thickness was further increased to 250 nm. It was attributed to an excessively thick intrinsic a-Si layer that would decrease the internal electrical field and interfere with charge separation. With the optimum intrinsic a-Si thickness of 150 nm, the conversion efficiency increased from 4.27% to 4.73% when the AZO wire length was increased from 1 to 2 mu m. Moreover, the proposed coaxial-structured solar cell exhibited a nearly 46% efficiency enhancement over a conventional a-Si thin-film solar cell.
Coaxial-Structured Solar Cells with Silicon Nanostructures
(2012)
Li, Hung-Hsien
;
Chen, Kuan-Heng
;
Chiou, Si-Ming
;
Liu, Han-Wen
;
Juan, Chuan-Ping
Coaxial-structured solar cells with different lengths silicon nanowires (SiNWs) fabricated by e-beam lithography and transformer coupled plasma reactive ion etching (TCP-RIE) were demonstrated in this paper. With the intrinsic amorphous silicon thickness of 15 nm and n-layer thickness of 25 nm, the short-current density and the conversion efficiency of the flat film solar cell were 17.58 mA/cm(2) and 3.16 %, respectively. Furthermore, the short-current density increased from 20.75 to 27.90 mA/cm(2) and the conversion efficiency increased from 3.59 to 4.69 % when the silicon nanowires length was increased from 0.5 to 1 mu m. The proposed coaxial-structured solar cells with SiNWs exhibited nearly 48.42 % efficiency enhancement over the plat film solar cell.
Gate-All-Around Poly-Si TFTs With Single-Crystal-Like Nanowire Channels
(2011-09-01)
Kang, Tsung-Kuei
;
Liao, Ta-Chuan
;
Lin, Chia-Min
;
Liu, Han-Wen
;
Wang, Fang-Hsing
The gate-all-around (GAA) poly-Si thin-film transistors (TFTs) with single-crystal-like nanowire (NW) channels (SCLNCs) are demonstrated and characterized. Via the nanoscale nitride spacer, the Si NW can be easily transformed within one crystalline grain of the two-shot sequential-lateral-solidification poly-Si film. As compared with the planar ones, the GAA-SCLNC TFTs showed more excellent characteristics. The results clearly show that the variations of device characteristics can be reduced by increasing the numbers of NWs in the channels and an average mobility above 410 cm(2)/V . s with a low standard deviation can be achieved for the GAA-SCLNC TFTs with 20-NW channels.
Improved characteristics for Pd nanocrystal memory with stacked HfAlO-SiO(2) tunnel layer
(2011-07-01)
Kang, Tsung-Kuei
;
Liu, Han-Wen
;
Wang, Fang-Hsing
;
Lin, Cheng-Li
;
Liao, Ta-Chuan
Stacked HfAlO-SiO(2) tunnel layers are designed for Pd nanocrystal nonvolatile memories. For the sample with 1.5 nm-HfAlO/3.5 nm-SiO(2) tunnel layer, a smaller initial memory window is obtained compared to the sample with 3.5 nm-HfAlO/1.5 nm-SiO(2) tunnel layer. Owing to the thermally induced traps in HfAlO-SiO(2) films are located at a farther distance from the Si substrate and more effective blocking of charge leakage by asymmetric tunnel barrier, a larger final memory window and better retention characteristic can be obtained for Al/blocking oxide SiO(2)/Pd NC5/1.5 nm-HfAlO/3.5 nm-SiO(2)/Si structure. A N(2) plasma treatment can further improve the memory characteristics. Better memory characteristics can be obtained for Pd-nanocrystal-based nonvolatile memory with an adequate thickness ratio of HfAlO to SiO(2). (C) 2011 Elsevier Ltd. All rights reserved.
Improved characteristics for Pd nanocrystal memory with stacked HfAlO-SiO2 tunnel layer
(2011-07-01)
Kang, Tsung-Kuei
;
Liu, Han-Wen
;
Wang, Fang-Hsing
;
Lin, Cheng-Li
;
Liao, Ta-Chuan
Stacked HfAlO-SiO2 tunnel layers are designed for Pd nanocrystal nonvolatile memories. For the sample with 1.5 nm-HfAlO/3.5 nm-SiO2 tunnel layer, a smaller initial memory window is obtained compared to the sample with 3.5 nm-HfAlO/1.5 nm-SiO2 tunnel layer. Owing to the thermally induced traps in HfAlO-SiO2 films are located at a farther distance from the Si substrate and more effective blocking of charge leakage by asymmetric tunnel barrier, a larger final memory window and better retention characteristic can be obtained for Al/blocking oxide SiO2/Pd NC5/1.5 nm-HfAlO/3.5 nm-SiO2/Si structure. A N-2 plasma treatment can further improve the memory characteristics. Better memory characteristics can be obtained for Pd-nanocrystal-based nonvolatile memory with an adequate thickness ratio of HfAlO to SiO2. (C) 2011 Elsevier Ltd. All rights reserved.
The Vacancy Pool Model for Amorphous In-Ga-Zn-O Thin-Film Transistors
(2019-01-01)
Tai, Ya-Hsiang
;
Liu, Han-Wen
;
Chan, Po-Chun
;
光電工程學系
;
Department of Photonics
In this paper, the reaction rate of oxygen vacancy (VO) by the derivatives of threshold voltage (Vth) in the amorphous indium-gallium-zinc oxide thin-film transistors under light pulses with altering duty ratios is investigated. More importantly, after collecting and analyzing a lot of experimental results, a comprehensive model named VO pool is proposed. The proposed model can more universally describe the characteristic of VO reacting to the light and its degradation behavior under various kinds of stress condition.