Browsing by Author "Liu, I-Chun"

Now showing 1 - 2 of 2

Improving Performance of JNA by Using LLVM JIT Compiler
(2013)
Tsai, Yu-Hsin
;
Wu, I-Wei
;
Liu, I-Chun
;
Shann, Jean Jyh-Jiun
;
資訊工程學系
Java Native Access (JNA) has been proposed to alleviate the burden of programming in Java Native Interface (JNI). JNA allows programmer to call native functions without writing any JNI codes. However, JNA suffers from some performance degradation. To overcome this problem, in this paper, we modify the JNA source code and integrate the LLVM JIT compiler into JNA to improve the performance. Our experiment achieves about 8% to 16% performance improvement for calling a native function with different types and numbers of arguments. Furthermore, our design is a non-traditional way of using the runtime compiler, and the challenges we encountered may help other researchers to face the similar situations.
Instruction Emulation and OS Supports of a Hybrid Binary Translator for x86 Instruction Set Architecture
(2015-01-01)
Liu, I-Chun
;
Wu, I-Wei
;
Shann, Jean Jyh-Jiun
;
資訊工程學系
;
Department of Computer Science
Binary translation is one of the most important techniques of virtualization. The main purpose of a binary translator (BT) is to translate an executable from a source instruction set architecture (ISA) to a target ISA. Traditionally, there are two types of binary translators: static binary translator (SBT) and dynamic binary translator (DBT). In recent years, a new type of BT called hybrid binary translator (HBT) was proposed, which translates the source executable first at static time, and then, at run time, if the execution of the target executable emits an exception because of reaching statically untranslated code, it switches to the attached dynamic translator for translating these code. Therefore, an HBT may have the merits of both good performance of SBT and easy handling of code discovery and code location problems of DBT. Nowadays, massive application programs have been developed for x86 platforms, and thus, many binary translators have been proposed for x86 ISA. However, due to the characteristics of CISC architecture of x86, for example, variable-length instruction format, the BT designed for it previously usually apply dynamic translation strategy or make use of profiling data for resolving the code discovery and code location problems. In this paper, we present an HBT which supports x86 ISA and emulates the execution behavior of an x86 executable under Linux operation system. In our x86-32 to x86-64 translation experiments, the target executables translated by our HBT outperform that of QEMU on most programs of EEMBC benchmark suite.