Browsing by Author "Liu, Kuan-Ju"
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Item type:Item, A Method to Determine the Located Region of Lateral Trap Position by Analysis of Three-Level Random Telegraph Signals in n-MOSFETs(2015-01-01) ;Chen, Ching-En ;Chang, Ting-Chang ;You, Bo ;Tsai, Jyun-YuLo, Wen-HungThis paper introduces a method to determine the located region of trap position by the analysis of three-level random telegraph signal (RTS) in partially-depleted silicon-on-insulator n-channel metal-oxide-semiconductor field-effect-transistors. For the cases of two traps, the average time at the 2nd level ((12)) is composed of average emission time of one trap and average capture time of the other. Comparison and analysis of (tau(2)) curves varying with gate voltage in RTS measurements with and without interchanged source/drain can clarify the located regions of the two traps. Moreover, the simplified equations are also considered and used to confirm the trap positions. (C) 2015 The Electrochemical Society. All rights reserved.Item type:Item, Abnormal temperature-dependent floating-body effect on Hot-Carrier Degradation in PDSOI n-MOSFETs(2014-12-01) ;Liu, Kuan-Ju ;Chang, Ting-Chang ;Yang, Ren-Ya ;Chen, Ching-EnHo, Szu-HanThis letter investigates abnormal degradation behavior after hot-carrier stress in partially-depleted silicon-oninsulator n-channel metal-oxide-semiconductor field effect transistors. It is found that the hot-carrier-induced degradation under floating body (FB) operation is more serious than that under grounded body (GB) operation due to the floating body effect (FBE). Furthermore, the degradation is independent on temperature under GB operation, because impact ionization is virtually independent on temperature under large VD. However, the degradation under FB operation becomes less serious with increasing temperature. This is due to a smaller source/body PN junction band offset at a high temperature, which causes fewer accumulated holes at the body terminal and reduces the FBE. (C) 2014 Elsevier B.V. All rights reserved.Item type:Item, Abnormal Transconductance Enhancement under Positive Bias Stress in Nanoscale n-Channel Fin Field-Effect-Transistors(2016) ;Liu, Kuan-Ju ;Chang, Ting-Chang ;Lin, Chien-Yu ;Chen, Ching-EnTsai, Jyun-YuThis work demonstrates an abnormal transconductance (GM) enhancement after positive bias stress (PBS) in n-channel high-k/metal gate stacked fin-field-effect-transistors. This abnormal GM enhancement is observed only in short channel devices. With the speculation that hole-trapping-induced electron accumulation is the dominant mechanism, PBS with floating source and drain is adopted as an investigative approach. This, together with the electric field simulation, verifies that hole-trapping in the HfO2 and SiN near the gate corner induces electron accumulated at the ends of the channel length. Such a phenomenon results in a shortening of effective channel length and further GM enhancement. (C) 2016 The Electrochemical Society. All rights reserved.Item type:Item, Analysis of abnormal transconductance in body-tied partially-depleted silicon-on-insulator n-MOSFETs(2017-12-31) ;Lin, Chien-Yu ;Chang, Ting-Chang ;Liu, Kuan-Ju ;Chen, Li-HuiChen, Ching-EnThis research investigates the mechanism of abnormal transconductance (Gm) and abnormal charge pumping current (I-CP) in body-tied partially-depleted silicon-on-insulator n-channel metal-oxide-semiconductor field effect transistors. The I-CP second hump region increases with channel length, yet is not affected by channel width. The cross-sectional view of the L-gate structure along the width direction demonstrates that a part of the poly gate area near the body contact is covered by a P+ implant, inducing a parasitic channel under the P+ poly gate. This parasitic channel leads to the abnormal Gm and I-CP hump, and such mechanism is further verified by body floating devices.Item type:Item, Analysis of Contrasting Degradation Behaviors in Channel and Drift Regions Under Hot Carrier Stress in PDSOI LD N-Channel MOSFETs(2017-06-01) ;Lin, Chien-Yu ;Chang, Ting-Chang ;Liu, Kuan-Ju ;Chen, Li-HuiTsai, Jyun-YuThis letter studies the effects of hot carrier stress (HCS) in laterally diffused silicon-on-insulator n-channel metal-oxide-semiconductor field-effect transistors. After HCS, threshold voltage and subthreshold swing degrade, while the ON-state current exhibits degradation after an abnormal spike due to hole trapping in the resistprotective oxide. Impact ionization simulation shows that low doping concentrations in the drift region cause a severe Kirk effect under HCS and more severe degradation at higher gate voltages. However, degradation in the channel contrasts with the simulation result, which suggests an additional mechanism. Variable temperature HCS confirms that channel degradation is instead dominated by temperature.Item type:Item, Analysis of Oxide Trap Characteristics by Random Telegraph Signals in nMOSFETs With HfO2-Based Gate Dielectrics(2016-04) ;Chen, Ching-En ;Chang, Ting-Chang ;You, Bo ;Tsai, Jyun-YuLo, Wen-HungThis letter investigates the oxide trap properties in n-channel metal-oxide-semiconductor field-effect transistors with HfO2 and Hf(1-x)ZrxO(2)/metal gate-stacks by an analysis of random telegraph signals. According to the multiphonon emission theory, the extracted relaxation energies show gate voltage dependence in devices with HfO2-based stacks. This dependence results from the different strengths of vibrations of the nearest neighbor Hf atoms of the oxygen vacancy in the immediate vicinity of the oxide trap. Furthermore, this dependence also induces an abnormal gate voltage dependence in terms of the activation energy required for electron capture. These results are confirmed by comparisons between two HfO2-based devices (HfO2 and Hf(1-x)ZrxO(2)).Item type:Item, Effects of fabrication method on defects induced by nitrogen diffusion to the hafnium oxide layer in metal-oxide-semiconductor field effect transistors(2016-12-01) ;Lu, Ying-Hsin ;Chang, Ting-Chang ;Ho, Szu-Han ;Chen, Ching-EnTsai, Jyun-YuThis study investigates how different metal gate fabrication methods induce variations in the defects which result from nitrogen diffusing into the hafnium oxide layer in metal-oxide-semiconductor field effect transistors (MOSFETs). By using the different fabrication methods of pre-TaN, post-TaN and post-TiN annealing, the work-function difference between the gate material and the semiconductor can be adjusted, leading to apparent differences in threshold voltage (V-th). In addition, the results of slow and fast I-V NBTI measurements show that the amount of the bulk trapping in the post-TiN device is the highest, followed by the post-TaN device and then the pre-TaN device. In addition, a nitrogen interstitial defect phenomenon, resulting in a temporary shift of threshold voltage (V-th) which is highest in the post-TiN the lowest in the pre-TaN device, is determined by double sweep fast I-V measurements. (C) 2016 Elsevier B.V. All rights reserved.Item type:Item, Electron-electron scattering-induced channel hot electron injection in nanoscale n-channel metal-oxide-semiconductor field-effect-transistors with high-k/metal gate stacks(2014-10-06) ;Tsai, Jyun-Yu ;Chang, Ting-Chang ;Chen, Ching-En ;Ho, Szu-HanLiu, Kuan-JuThis work investigates electron-electron scattering (EES)-induced channel hot electron (CHE) injection in nanoscale n-channel metal-oxide-semiconductor field-effect-transistors (n-MOSFETs) with high-k/metal gate stacks. Many groups have proposed new models (i.e., single-particle and multiple-particle process) to well explain the hot carrier degradation in nanoscale devices and all mechanisms focused on Si-H bond dissociation at the Si/SiO2 interface. However, for high-k dielectric devices, experiment results show that the channel hot carrier trapping in the pre-existing high-k bulk defects is the main degradation mechanism. Therefore, we propose a model of EES-induced CHE injection to illustrate the trapping-dominant mechanism in nanoscale n-MOSFETs with high-k/metal gate stacks. (C) 2014 AIP Publishing LLC.Item type:Item, Fast-IV Measurement Investigation of the Role of TiN Gate Nitrogen Concentration on Bulk Traps in HfO2 Layer in p-MOSFETs(2017-06-01) ;Lu, Ying-Hsin ;Chang, Ting-Chang ;Liao, Jih-Chien ;Chen, Li-HuiLin, Yu-ShanThis letter investigates the role of the TiN gate's nitrogen concentration on bulk traps in the HfO2 layer in p-MOSFETs using fast I-V measurement. During negative bias temperature instability, the holes trapped in the HfO2 layer will induce Vth degradation. The fast I-V double sweep confirms the holes are trapped in process-related pre-existing defects. These defects are interstitial-type, influenced by the nitrogen in the TiN gate diffusing to the HfO2 layer when the device undergoes thermal annealing. Moreover, these nitrogen interstitials increase with increasing TiN gate nitrogen concentration, which induces more holes being trapped in the HfO2 layer.Item type:Item, High-k shallow traps observed by charge pumping with varying discharging times(2013-11-07) ;Ho, Szu-Han ;Chang, Ting-Chang ;Lu, Ying-Hsin ;Wang, Bin-WeiLo, Wen-HungIn this paper, we investigate the influence of falling time and base level time on high-k bulk shallow traps measured by charge pumping technique in n-channel metal-oxide-semiconductor field-effect transistors with HfO2/metal gate stacks. N-T-V-high level characteristic curves with different duty ratios indicate that the electron detrapping time dominates the value of N-T for extra contribution of I-cp traps. N-T is the number of traps, and I-cp is charge pumping current. By fitting discharge formula at different temperatures, the results show that extra contribution of I-cp traps at high voltage are in fact high-k bulk shallow traps. This is also verified through a comparison of different interlayer thicknesses and different TixN1-x metal gate concentrations. Next, N-T-V-high level characteristic curves with different falling times (t(falling time)) and base level times (t(base level)) show that extra contribution of I-cp traps decrease with an increase in t(falling time). By fitting discharge formula for different t(falling time), the results show that electrons trapped in high-k bulk shallow traps first discharge to the channel and then to source and drain during t(falling time). This current cannot be measured by the charge pumping technique. Subsequent measurements of N-T by charge pumping technique at t(base level) reveal a remainder of electrons trapped in high-k bulk shallow traps. (c) 2013 AIP Publishing LLC.Item type:Item, Impact of post-metal deposition annealing temperature on performance and reliability of high-K metal-gate n-FinFETs(2016-12-01) ;Lin, Chien-Yu ;Chang, Ting-Chang ;Liu, Kuan-Ju ;Tsai, Jyun-YuChen, Ching-EnThis research studies the effects of post-metal deposition annealing temperature on degradation induced by positive bias stress (PBS) in TiN/HfO2 n-channel fin field-effect transistors (FinFETs). The initial electrical characteristics possess higher threshold voltage, transconductance and on-state current in high-annealing temperature devices. In addition, PBS-induced degradation was found to be more severe in high-annealing temperature devices due to more high-k bulk traps. However, in these devices, oxygen vacancies are generated within HfO2 since oxygen is more likely to diffuse toward the interface layer (IL) and repair Si/SiO2 dangling bonds. Furthermore, using charge-pumping and C-V measurements, less interface trapping and a thicker IL were found in high-annealing temperature devices, verifying the proposed model. (C) 2016 Elsevier B.V. All rights reserved.Item type:Item, Investigation of abnormal negative threshold voltage shift under positive bias stress in input/output n-channel metal-oxide-semiconductor field-effect transistors with TiN/HfO2 structure using fast I-V measurement(2014-03-17) ;Ho, Szu-Han ;Chang, Ting-Chang ;Lu, Ying-Hsin ;Chen, Ching-EnTsai, Jyun-YuThis letter investigates abnormal negative threshold voltage shifts under positive bias stress in input/output (I/O) TiN/HfO2 n-channel metal-oxide-semiconductor field-effect transistors using fast I-V measurement. This phenomenon is attributed to a reversible charge/discharge effect in pre-existing bulk traps. Moreover, in standard performance devices, threshold-voltage (V-t) shifts positively during fast I-V double sweep measurement. However, in I/O devices, V-t shifts negatively since electrons escape from bulk traps to metal gate rather than channel electrons injecting to bulk traps. Consequently, decreasing pre-existing bulk traps in I/O devices, which can be achieved by adopting HfxZr1-xO2 as gate oxide, can reduce the charge/discharge effect. (C) 2014 AIP Publishing LLC.Item type:Item, Investigation of defect-induced abnormal body current in fin field-effect-transistors(2015-08-24) ;Liu, Kuan-Ju ;Chang, Ting-Chang ;Chen, Ching-En ;Yang, Ren-YaTsai, Jyun-YuThis letter investigates the mechanism of abnormal body current at the linear region in n-channel high-k/metal gate stack fin field effect transistors. Unlike body current, which is generated by impact ionization at high drain voltages, abnormal body current was found to increase with decreasing drain voltages. Notably, the unusual body leakage only occurs in three-dimensional structure devices. Based on measurements under different operation conditions, the abnormal body current can be attributed to fin surface defect-induced leakage current, and the mechanism is electron tunneling to the fin via the defects, resulting in holes left at the body terminal. (C) 2015 AIP Publishing LLC.Item type:Item, On the Origin of Anomalous OffCurrent Under Hot Carrier Stress in p-Channel DDDMOS Transistors With STI Structure(2014-06-01) ;Chen, Ching-En ;Chang, Ting-Chang ;Chen, Hua-Mao ;You, BoYang, Kai-HsiangThis letter investigates the abnormal OFF-current behavior induced by hot carrier stress (HCS) in p-channel double diffused drain metal-oxide-semiconductor transistors with a shallow trench isolation (STI) structure. According to ISE-TCAD simulation, the electric field at the drain-side corners of the high-voltage n-well (HVNW) adjacent to the STI trench is stronger than the electric field in the channel center in width direction. Moreover, because a nitride layer acts as a buffer in STI, the electrons generated by impact ionization at the corners of the HVNW can be easily trapped in the nitride layer or at the liner oxide/nitride layer interface. Furthermore, the extension of electron trapping in STI from drain to source during HCS forms the OFF-current conductive path. Based on the charge pumping measurements at different operation conditions, this path formation is further demonstrated by the comparisons of charge pumping measurements between initial state and after HCS.Item type:Item, The Impact of Pre/Post-metal Deposition Annealing on Negative-Bias-Temperature Instability in HfO2 Stack p-Channel Metal-Oxide-Semiconductor Field Effect Transistors(2015-01-01) ;Lu, Ying-Hsin ;Chang, Ting-Chang ;Ho, Szu-Han ;Chen, Ching-EnTsai, Jyun-YuThis study investigates the impact of pre/post-metal deposition annealing on negative-bias-temperature instability (NBTI) in HfO2 stack p-channel metal-oxide-semiconductor field effect transistors (MOSFETs). In the initial electrical characteristics, the most apparent difference is threshold voltage (V-th) resulting from the work-function difference between the gate material and the semiconductor. Furthermore, fast I-V measurements indicate that the device with post-metal deposition annealing shows more degradation of V-th in NBTI, which originates from the more nitrogen interstitial defects in HfO2. This phenomenon is confirmed to be due to the process-related pre-existing defects by an analysis of double sweep fast I-V measurements. (c) 2015 The Electrochemical Society. All rights reserved.Item type:Item, Trap state passivation improved hot-carrier instability by zirconium-doping in hafnium oxide in a nanoscale n-metal-oxide semiconductor-field effect transistors with high-k/metal gate(2016-04-25) ;Liu, Hsi-Wen ;Chang, Ting-Chang ;Tsai, Jyun-Yu ;Chen, Ching-EnLiu, Kuan-JuThis work investigates the effect on hot carrier degradation (HCD) of doping zirconium into the hafnium oxide high-k layer in the nanoscale high-k/metal gate n-channel metal-oxide-semiconductor field-effect-transistors. Previous n-metal-oxide semiconductor-field effect transistor studies demonstrated that zirconium-doped hafnium oxide reduces charge trapping and improves positive bias temperature instability. In this work, a clear reduction in HCD is observed with zirconium-doped hafnium oxide because channel hot electron (CHE) trapping in pre-existing high-k bulk defects is the main degradation mechanism. However, this reduced HCD became ineffective at ultra-low temperature, since CHE traps in the deeper bulk defects at ultra-low temperature, while zirconium-doping only passivates shallow bulk defects. Published by AIP Publishing.