Browsing by Author "Liu, Po-Tsun"
Now showing 1 - 20 of 167
- Results Per Page
- Sort Options
Item type:Item, A fabrication of germanium nanocrystal embedded in silicon-oxygen-nitride layer(2006) ;Tu, Chun-Hao ;Chang, Ting-Chang ;Liu, Po-Tsun ;Liu, Hsin-ChouWeng, Chi-FengThe formation of germanium nanocrystals embedded in silicon-oxygen-nitride (SiON) layer acting as distributed charge storage elements is proposed in this work. A large memory window is observed due to the isolated Ge nanocrystals in the SiON gate stack layer. The Ge nanocrystals were nucleated after the high-temperature oxidation of SiGeN layer. The nonvolatile memory device with the Ge nanocrystals embedded in SiON stack layer exhibits 4 V threshold voltage shift under 7 V write operation. Also, the sequent high-temperature oxidation of the SiGeN layer acting as the blocking oxide is proposed to enhance the performance of nonvolatile memory devices. (c) 2006 The Electrochemical Society.Item type:Item, A new pixel circuit compensating for brightness variation in lagre size and high resolution AMOLED displays(2007-12-01) ;Lu, Hau-Yan ;Chang, Ting-Chang ;Tai, Ya-Hsing ;Liu, Po-TsunChi, SienA new pixel design and driving method for active-matrix organic light-emitting diode (AMOLED) display using low-temperature polycrystalline silicon thin-film transistor (LTPS-TFT) is proposed. The new circuit consists, of five TFTs and one capacitor to eliminate the variation in the threshold voltage of the TFTs, and the drop in the supply voltage in it single frame operation. The proposed pixel circuit has been verified to realize uniform output current by the simulation work using HSPICE software. The simulated error rate of the output current is also discussed in this paper. The novel pixel design has great potential for use in large size and high resolution AMOLED displays.Item type:Item, A non-selenization technology by co-sputtering deposition for solar cell applications(1970-01-01) ;Jheng, Bao-Tang ;Liu, Po-Tsun ;Wu, Meng-Chyi ;Shieh, Han-Ping D.光電工程學系"This work presents a novel method to form polycrystalline Cu(In1-xGax)Se-2 (CIGS) thin film by co-sputtering of In-Se and Cu-Ga alloy targets without an additional selenization process. An attempt was also made to thoroughly elucidate the surface morphology, crystalline phases, physical properties, and chemical properties of the CIGS films by using material analysis methods. Experimental results indicate that CIGS thin films featured densely packed grains and chalcopyrite phase peaks of (112), (220), (204), (312), and (116). Raman spectroscopy analysis revealed chalcopyrite CIGS phase with Raman shift at 175 cm(-1), while no signal at 258 cm(-1) indicated the exclusion of Cu2-xSe phase. Hall effect measurements confirmed the polycrystalline Cu(In, Ga)Se-2 thin film to be of p type semiconductor with a film resistivity and mobility of 2.19 x 102 Omega cm and 88 cm(2)/V s, respectively. (C) 2012 Optical Society of America"Item type:Item, A novel a-Si TFT pixel circuit with high immunity to the degradation of the TFTs and OLEDs used in AMOLED displays(2007) ;Lu, Hau-Yan ;Liu, Po-Tsun ;Hu, Chin-Wei ;Chang, Ting-ChangChi, SienA simple pixel circuit employing a-Si TFT for AMOLED is proposed. The proposed one can eliminate both the threshold voltage shift of the driving TFT and the OLED. The simulation results indicate that the proposed circuit significantly improves the non-uniformity of output current by the new compensation operation.Item type:Item, A novel nanowire channel poly-Si TFT functioning as transistor and nonvolatile SONOS memory(2007-09-01) ;Chen, Shih-Ching ;Chang, Ting-Chang ;Liu, Po-Tsun ;Wu, Yung-ChunLin, Po-ShunIn this letter, a polycrystalline silicon thin-film transistor consisting of silicon-oxide-nitride-oxide-silicon (SONOS) stack gate dielectric and nanowire (NW) channels was investigated for the applications of transistor and nonvolatile memory. The proposed device, which is named as NW SONOS-TFT, has superior electrical characteristics of transistor, including a higher drain current, a smaller threshold voltage (V-th), and a steeper subthreshold slope. Moreover, the NW SONOS-TFT also can exhibit high program/erase efficiency under adequate bias operation. The duality of both transistor and memory device for the NW SONOS-TFT can be attributed to the trigate structure and channel corner effect.Item type:Item, A novel self-aligned etch-stopper structure with lower photo leakage for AMLCD and sensor applications(2006-12-01) ;Liang, Chung-Yu ;Gan, Feng-Yuan ;Liu, Po-Tsun ;Yeh, F. S.Chen, Stephen Hsin-LiIn this letter, the authors introduce a novel self-aligned etch-stopper sidewall-contact hydrogenated amorphous silicon (a-Si: H) thin-film transistor (ESSC-TFT), which reduces the photo leakage current by more than one order of magnitude and increases the ON-OFF ratio to seven orders of magnitude under back light illumination. Such a TFT will enable high-resolution and high-brightness liquid-crystal displays (LCDs) for next-generation TV, monitor, notebook, and mobile-phone applications. This ESSC-TFT design reduces the volume of a-Si film in which the active region can totally be shielded by the gate metal resulting in the prevention from direct back light illumination. With the sidewall contact, the hole current is reduced due to the smaller contact area between drain/source and a-Si layer. As well as the source, drain parasitic intrinsic resistance of a-Si can be also lessened by the ESSC-TFT structure. Although the defects between etched a-Si and n(+) a-Si film may degrade the ON current, the ESSC-TFT still exhibits higher ON-OFF ratio and lower leakage than the one in traditional etch-stopper (ES)-TFT structure. The ESSC-TFT structure can be used not only for TFT-LCD application but also for the applications that demand high ON-OFF ratio and low-leakage device, such as X-ray image sensor.Item type:Item, A novel threshold voltage compensation pixel circuit with high immunity to the supply voltage drop for AMOLED displays(2006) ;Lu, Hau-Yan ;Liu, Po-Tsun ;Chang, Ting-Chang ;Chi, Sien光電工程學系A new pixel circuit employing LTPS TFT for AMOLED is proposed. The proposed one can eliminate both the threshold voltage variation of the driving TFT and the supply voltage drop. The simulation results indicate that the proposed circuit significantly improves the non-uniformity of output current by the new compensation operation.Item type:Item, A promising sputtering route for dense Cu2ZnSnS4 absorber films and their photovoltaic performance(2014-09-01) ;Jheng, Bao-Tang ;Liu, Po-Tsun ;Wu, Meng-Chyi ;光電工程學系顯示科技研究所Copper zinc tin sulfide (Cu2ZnSnS4, CZTS) is highly abundant in nature. It is an important absorber material for the development of low-cost and sustainable next-generation I-2-II-IV-VI4 thin-film solar cells because it has a the tunable direct band gap energy, inexpensive constituent elements, and a large absorption coefficient in the visible wavelength region. This work develops an efficient one-step vacuum-based approach to depositing CZTS films without the need to supply excess sulfur during/after deposition or to perform any post-sulfurization treatment. This one-step RF sputtering process produces CZTS films that are crystalline, phase-pure, dense, smooth, and continuous. Air Mass 1.5 G power conversion efficiencies of as high as 6% have been achieved with an antireflection coating, demonstrating that this new approach has great potential as a low-cost alternative for high-efficiency CZTS solar cell production. (C) 2014 Elsevier B.V. All rights reserved.Item type:Item, A promising sputtering route for dense Cu2ZnSnS4 absorber films and their photovoltaic performance(2014-09-01) ;Jheng, Bao-Tang ;Liu, Po-Tsun ;Wu, Meng-Chyi ;光電工程學系顯示科技研究所Copper zinc tin sulfide (Cu2ZnSnS4, CZTS) is highly abundant in nature. It is an important absorber material for the development of low-cost and sustainable next-generation I-2-II-IV-VI4 thin-film solar cells because it has a the tunable direct band gap energy, inexpensive constituent elements, and a large absorption coefficient in the visible wavelength region. This work develops an efficient one-step vacuum-based approach to depositing CZTS films without the need to supply excess sulfur during/after deposition or to perform any post-sulfurization treatment. This one-step RF sputtering process produces CZTS films that are crystalline, phase-pure, dense, smooth, and continuous. Air Mass 1.5 G power conversion efficiencies of as high as 6% have been achieved with an antireflection coating, demonstrating that this new approach has great potential as a low-cost alternative for high-efficiency CZTS solar cell production. (C) 2014 Elsevier B.V. All rights reserved.Item type:Item, Ambient Stability Enhancement of Thin-Film Transistor With InGaZnO Capped With InGaZnO:N Bilayer Stack Channel Layers(2011-10-01) ;Liu, Po-Tsun ;Chou, Yi-Teh ;Teng, Li-Feng ;Li, Fu-HaiFuh, Chur-ShyangA thin-film transistor (TFT) with bilayer stack structure of amorphous nitrogenated InGaZnO (IGZO) (a-IGZO:N) on an IGZO channel is proposed to enhance device stability. The a-IGZO: N acting as a back-channel passivation (BCP) is formed sequentially just after the sputter-deposited amorphous IGZO (a-IGZO) film with in situ nitrogen incorporation process. The a-IGZO:N can effectively prevent the a-IGZO channel from exposing to the atmosphere and retarding interactions with ambient oxygen species. Also, the optical energy bandgap of the a-IGZO:N film is decreased due to the addition of nitrogen. This causes the a-IGZO TFT with a-IGZO:N BCP to exhibit high immunity to the ultraviolet-radiation impact.Item type:Item, Analysis of parasitic resistance and channel sheet conductance of a-Si : H TFT under mechanical bending(2007) ;Wang, M. C. ;Chang, T. C. ;Liu, Po-Tsun ;Tsao, S. W.Chen, J. R.The effect of mechanical strain on the performance of a-Si: H thin-film transistors (TFTs) with different channel lengths was studied under uniaxial compressive and tensile strain applied parallel to the TFT source-drain current path. The source-drain parasitic resistance and channel sheet conductance were extracted to explain the device performance under mechanical strain. These results indicate that the compressive bending leads to a significant decrease (similar to 16%) in the source-drain parasitic resistance. The channel sheet conductance has shown a 6% variation under mechanical bending. The variation under mechanical bending strain originates from the evolution of defect state density in a-Si:H channel material. (c) 2007 The Electrochemical Society.Item type:Item, Annealing effects on resistive switching of IGZO-based CBRAM devices(2020-10-01) ;Gan, Kai-Jhih ;Liu, Po-Tsun ;Ruan, Dun-Bao ;Chiu, Yu-ChuanSze, Simon M.In this study, the impact of post-oxide deposition annealing on performance of IGZO-based conductive-bridging random access memory (CBRAM) is reported. It is found that besides the distinct reduction in resistive switching parameters of SET/RESET voltages, their dispersions, and the resistance ratio of high-resistance state to low-resistance state can be improved after N-2 annealing. The annealing effects on enhancing of the resistive switching properties are investigated by x-ray photoelectron spectra. It can be considered that the formation of the filament is better controlled by the increase of oxygen vacancies in the switching layer, which is the main reason for the improvement of resistive switching characteristics.Item type:Item, Anomalous Gate-Edge Leakage Induced by High Tensile Stress in NMOSFET(2008-11-01) ;Liu, Po-Tsun ;Huang, Chen-Shuo ;Lim, Peng-Soon ;Lee, Da-YuanTsao, Shueh-WenAnomalously high gate tunneling current, induced by high-tensile-stress memorization technique, is reported in this letter. Carrier-separation measurement method shows that the increased gate tunneling current is originated from the higher gate-to-source/drain (S/D) tunneling current, which worsens when channel length is getting shorter. Also, the device with enhanced tensile strain exhibits 9% higher gate-to-S/D overlapping capacitance. These data indicate that the anomalously high gate tunneling current could be attributed to the high tensile strain that induces the effects of excessive lightly doped dopant diffusion and higher gate-edge damage. The proposed inference is confirmed by channel hot-electron stress.Item type:Item, Application of fluorine doped oxide (SiOF) spacers for improving reliability in low temperature polycrystalline thin film transistors(2008-12-01) ;Feng, Li-Wei ;Chang, Ting-Chang ;Liu, Po-Tsun ;Tu, Chun-HaoWu, Yung-ChunThe novel process of self-aligned fluorine doped oxide (SiOF) spacers on low temperature poly-Si (LTPS) lightly doped drain (LDD) thin film transistors (TFTs) is proposed. A fluorine doped oxide spacers were provided to generate the lower dissociation Si-F bonds adjusted to the interface of the drain which is the largest lateral electric field region for lightly doped drain structure. The stronger Si-F bonds can reduce the bonds broken by impact ionization. It is found that the output characteristics of SiOF spacers TFTs show the superior immunity to kink effect. The degradations in Vth shifting, subthreshold slope, drain current and transconductance of SiOF spacers after DC stress are improved. (C) 2008 Elsevier B.V. All rights reserved.Item type:Item, Application of secondary electron potential contrast on junction leakage isolation(2009-09-21) ;Liu, Po-Tsun ;Lee, Jeng-Han ;Huan, Y. S. ;Su, David光電工程學系Secondary electron potential contrast (SEPC) technology with an in situ dynamic trigger was studied to inspect P(+)/N-well junction leakage arising from P-well misalignment in a static random access memory cell. Combining SEPC with scanning electron microscopy observations allows direct identification of the junction shift. Furthermore, an in situ negative bias applied to the P-well can create a wider depletion region and eliminate the leakage path in P(+)/N-well contacts, allowing the P(+)/N well to operate normally. This proposed in situ dynamic trigger method is a promising and effective approach to investigating device physics under a dynamic scope. (C) 2009 American Institute of Physics. [doi:10.1063/1.3233963]Item type:Item, Application of Supercritical CO(2) Fluid for Dielectric Improvement of SiO(x) Film(2009-01-01) ;Tsai, Chih-Tsung ;Chang, Ting-Chang ;Liu, Po-Tsun ;Cheng, Yi-LiKin, Kon-TsuIn this paper the supercritical carbon dioxide (SCCO(2)) fluid technology is employed to improve the quality of E-gun evaporation deposited silicon oxide (SiO(x)) film at 150 degrees C. After the treatment of SCCO(2) fluid mixed with ethyl alcohol and pure H(2)O, the oxygen content of SiO(x) film increases and the traps within SiO(x) are terminated by forming Si-O-Si feature bonds. The leakage current density reduces from 10(-2) to 3x10(-8) A/cm(2) at an electric field of 3 MV/cm due to the passivation of traps, and the hysteresis effect in the capacitance-voltage curve is eliminated.Item type:Item, Application of Supercritical CO2 Fluid for Dielectric Improvement of SiOx Film(2009-01-01) ;Tsai, Chih-Tsung ;Chang, Ting-Chang ;Liu, Po-Tsun ;Cheng, Yi-LiKin, Kon-TsuIn this paper the supercritical carbon dioxide (SCCO2) fluid technology is employed to improve the quality of E-gun evaporation deposited silicon oxide (SiOx) film at 150 degrees C. After the treatment of SCCO2 fluid mixed with ethyl alcohol and pure H2O, the oxygen content of SiOx film increases and the traps within SiOx are terminated by forming Si-O-Si feature bonds. The leakage current density reduces from 10(-2) to 3x10(-8) A/cm(2) at an electric field of 3 MV/cm due to the passivation of traps, and the hysteresis effect in the capacitance-voltage curve is eliminated.Item type:Item, Application of supercritical fluids for amorphous silicon thin film transistors(2006-01-01) ;Tsai, Chih-Tsung ;Chang, Ting-Chang ;Liu, Po-Tsun ;Yang, Po-Yu光電工程學系Supercritical fluid technology([1,2]) is employed for the first time to passivate the defect states in amorphous silicon thin film transistors (a-Si.-H TFTs) at low temperature (150 degrees C). Due to supercritical fluids have gas-like properties of diffusivity and viscosity that allow it to efficiently carry H2O molecule into amorphous thin film and passivates defects at low temperature, Experiment results indicate that superior transfer characteristic is obtained and the density of states (DOS) is reduced significantly after the treatment of supercritical fluids mixed with water/propyl alcohol.Item type:Item, Back-Channel Etched Double Layer In-W-O/In-W-Zn-O Thin-Film Transistors(2018-01-01) ;Li, Zhen-Hao ;Kuo, Po-Yi ;Chen, Wen-Tzu ;Liu, Po-Tsun光電工程學系The thin-film transistors (TFTs) with back-channel etched (BCE) type enable channel length to be narrow and reduce parasitic capacitances owing to its shorter overlaps between the gate and source/drain (S/D) electrodes. In this study, a high-performance BCE-type oxide thin-film transistor was proposed for investigation. A novel stacked double layer In-W-O (IWO) / In-W-Zn-O (IWZO) channel structure was fabricated and developed. Respectively, IWZO exhibits a high resistance to back-channel etching damage and IWO channel achieve a high mobility. The double layer IWO/IWZO TFTs are promising candidates for driving active matrix organic light-emitting diode (AMOLED) and high resolution display applications in the future. The double layer IWO/IWZO TFTs with S/D pattern by H2O2 + KOH can exhibit the high-performance electrical characteristic. The field-effect mobility (mu FE) similar to 21.1cm(2)/V-s, subthreshold swing (S.S.) similar to 0.15 V/dec., threshold voltage (V-TH) similar to -0.092 V, and on/off ratio similar to 4.88x10(8) can be achieved.Item type:Item, Bipolar resistive switching characteristics of Al-doped zinc tin oxide for nonvolatile memory applications(1970-01-01) ;Fan, Yang-Shun ;Liu, Po-Tsun ;Teng, Li-Feng ;Hsu, Ching-Hui光電工程學系"Resistive random access memory using Al-doped zinc tin oxide (AZTO) as resistive switching layer was prepared by radio-frequency magnetron sputtering at room temperature. The Ti/AZTO/Pt device exhibits reversible and robust bi-stable resistance switching behavior over hundreds of switching cycles within 2 V sweep voltage. The Ti/AZTO/Pt device showed stable retention characteristics for over 104 s under read disturb stress condition. Besides, the electrical conduction mechanism was dominated by ohmic conduction in low resistance state, while the current transport behavior followed a trap-controlled space-charge-limited conduction process in high resistance state. (C) 2012 American Institute of Physics. [http://dx.doi.org/10.1063/1.4742737]"