Browsing by Author "Liu, Qi"

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Demonstration of 3D Vertical RRAM with Ultra Low-leakage, High-selectivity and Self-compliance Memory Cells
(2015)
Luo, Qing
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Xu, Xiaoxin
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Liu, Hongtao
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Lv, Hangbing
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Gong, Tiancheng
Developing high performance self-selective cell (SSC) is one of the most critical issues of the integration of 3D vertical RRAM (V-RRAM). In this work, a four-layer V-RRAM array, with high performance HfO2/mixed ionic and electronic conductor (MIEC) bilayer SSC, was demonstrated for the first time. Several salient features were achieved, including ultra-low half-select leakage (<0.1 pA), very high nonlinearity (>10(3)), low operation current (nA level), self-compliance, high endurance (>10(7)), and robust read/write disturbance immunity.
Fully CMOS Compatible 3D Vertical RRAM with Self-aligned Self-selective Cell Enabling Sub-5nm Scaling
(2016)
Xu, Xiaoxin
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Luo, Qing
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Gong, Tiancheng
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Lv, Hangbing
;
Long, Shibing
In low cost vertical resistive switching memory (VRRAM), the inter-layer leakage becomes a serious problem, primarily resulting from the ultimate scaling in the vertical dimension. In this work, for the first time, we present a novel approach of fabricating 3D VRRAM using self-aligned self-selective RRAM to effectively address such challenge. By successfully suppressing the inter-layer leakage, the scaling limit of VRRAM could be extended beyond 5 nm. Other benefits, such as high nonlinearity (> 10(3)), low power consumption (sub-mu A), robust endurance and excellent disturbance immunity, were also demonstrated.
High on/off ratio black phosphorus based memristor with ultra-thin phosphorus oxide layer
(2019-11-04)
Wang, Yudan
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Wu, Facai
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Liu, Xingqiang
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Lin, Jun
;
Chen, Jui-Yuan
The scaling down of switching media encounters high leakage current in the traditional oxide material based memristors, resulting in high power consumption of chips. Two-dimensional (2D) materials promise an ultimate device scaling down to atomic layer thickness. Herein, black phosphorus (BP) and its self-assembly phosphorous oxide (BP) memristors are constructed, which leverages the high on/off ratio operation of oxides and low leakage current of 2D materials with high performance. The memristors exhibit reproducible and reliable switching characteristics with the on/off ratio >10(7) and data retention >10(4) s. Depending on the high reproducibility, basic "AND" and "OR" gates have been constructed on flexible substrates. Moreover, on the basis of the symmetry and linearity of conductance in the devices, the neural network simulation for supervised learning presents an online learning accuracy of 91.4%. This work opens an avenue for future flexible electronics.
Interface Engineering via MoS2 Insertion Layer for Improving Resistive Switching of Conductive-Bridging Random Access Memory
(2019-04-01)
Wu, Facai
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Si, Shuyao
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Cao, Peng
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Wei, Wei
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Zhao, Xiaolong
Conductive-bridging random access memory (CBRAM), dominated by conductive filament (CF) formation/rupture, has received much attention due to its simple structure and outstanding performances for nonvolatile memory, neuromorphic computing, digital logic, and analog circuit. However, the negative-SET behavior can degrade device reliability and parameter uniformity. And large RESET current increases power consumption for memory applications, By inserting 2D material, molybdenum disulfide (MoS2), for interface engineering with the device configuration of Ag/ZrO2/MoS2/Pt, the negative SET behavior is eliminated, and the RESET current is reduced simultaneously. With the ion barrier property of MoS2, the CF can probably not penetrate the MoS2 layer, thus eliminating the negative-SET behavior. And with the low thermal conductivity of MoS2, the internal temperature of the device would be relatively high at RESET, accelerating probably redox reactions. As a result, the RESET current is reduced by an order of magnitude. This interface engineering opens up a way in improving the resistive switching performances of CBRAM, and can be of great benefit to the potential applications of MoS2 in next-generation data storage.
Recommended Methods to Study Resistive Switching Devices
(2019-01-01)
Lanza, Mario
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Wong, H-S Philip
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Pop, Eric
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Ielmini, Daniele
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Strukov, Dimitri
Resistive switching (RS) is an interesting property shown by some materials systems that, especially during the last decade, has gained a lot of interest for the fabrication of electronic devices, with electronic nonvolatile memories being those that have received the most attention. The presence and quality of the RS phenomenon in a materials system can be studied using different prototype cells, performing different experiments, displaying different figures of merit, and developing different computational analyses. Therefore, the real usefulness and impact of the findings presented in each study for the RS technology will be also different. This manuscript describes the most recommendable methodologies for the fabrication, characterization, and simulation of RS devices, as well as the proper methods to display the data obtained. The idea is to help the scientific community to evaluate the real usefulness and impact of an RS study for the development of RS technology.