Browsing by Author "Liu, Sheng-Hsien"

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A Novel Ion-Bombarded and Plasma-Passivated Charge Storage Layer for SONOS-Type Nonvolatile Memory
(2012-10-01)
Liu, Sheng-Hsien
;
Yang, Wen-Luh
;
Wu, Chi-Chang
;
Chao, Tien-Sheng
;
電子物理學系
A novel technique combination of ion bombardment (IB) and NH3 plasma treatment (PT) has been presented to yield a highly effective charge storage layer for Si/SiO2/Si3N4/SiO2/Si (SONOS)-type nonvolatile memory applications. The IB technique creates additional trap sites within the charge storage layer strikingly to enhance the charge trapping/detrapping efficiency of the storage layer, and the NH3 PT passivates shallow trap sites significantly to improve reliability characteristics. The distribution of trap sites corresponding with various energy levels is clearly described by discharge-based multipulse analysis. As compared with the control sample (without IB and NH3 PT), the ion-bombarded and NH3-plasma-passivatedmemory device has faster program/erase speeds and larger memory window. In addition, the competent reliability properties of the ion-bombarded and NH3-plasma-passivated memory, such as good endurance, long data retention, and acceptable disturbance, were also demonstrated in this letter.
High Performance Cu-doped SiO2 ReRAM by a Novel Chemical Soak Method
(2011-01-01)
Chin, Fun-Tat
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Yang, Wen-Luh
;
Chao, Tien-Sheng
;
Chang, Yuan-Ming
;
Lin, Li-Min
In this paper, a novel chemical soak method is proposed to fabricate a Cu-doped SiO2 ReRAM device. This method can easily fabricate a lightly Cu-doped SiO2 film and effectively improve the reliability of the conventional Cu-doped SiO2 ReRAM device. A reproducible bipolar switching characteristic with set/reset voltage (ca. 2.5 V/ -0.7 V) is performed in this device and the electrical conduction in HRS and LRS are related to Poole-Frenkel and Ohmic conduction, respectively. Excellent performance in terms of high on/off ratio (similar to 10(6)), narrow range distribution of set and reset voltages, stable data retention, and up to 110 times switching cycles has been achieved by this novel chemical soak method for Cu-doped SiO2 ReRAM device.
High-Performance Double-Layer Nickel Nanocrystal Memory by Ion Bombardment Technique
(2013-10-01)
Liu, Sheng-Hsien
;
Yang, Wen-Luh
;
Lin, Yu-Hsien
;
Wu, Chi-Chang
;
Chao, Tien-Sheng
A novel ion bombardment (IB) technique is presented to fabricate and embed double-layer (DL) Ni nanocrystal (NC) in silicon nitride for TaN/Al2O3/Si3N4/SiO2/Si nonvolatile memory applications. In contrast to other methods of forming DL metal NC, the IB technique is a relatively simple fabrication method and completely compatible with the current IC manufacturing technologies. Using the IB technique, a high-quality ultrathin interlayer between top and bottom layered NCs can be easily formed and controlled. Compared with the control sample, the IB-induced DL Ni NC memory exhibits superior performance in terms of faster program and erase (P/E) speeds, longer data retention, better endurance, negligible program disturbance, and great potential for a multilevel operation. In addition, the IB-induced DL Ni NC device also shows higher P/E efficiency as well as similar excellent reliability by comparison with other conventional DL metal NC memories due to the high-quality ultrathin interlayer.
High-Performance Polyimide-Based ReRAM for Nonvolatile Memory Application
(2013-01-01)
Liu, Sheng-Hsien
;
Yang, Wen-Luh
;
Wu, Chi-Chang
;
Chao, Tien-Sheng
;
Ye, Meng-Ru
In this letter, high-performance polyimide (PI)-based resistive random access memory (ReRAM) is presented by utilizing a new DAXIN-PI thin film as a resistance layer. The switching between high-and low-resistance states is triggered by the formation and dissociation of the charge transfer complex. As compared with the electrochemical-metallization-based ReRAM and the valence-change-based ReRAM, this DAXIN-PI ReRAM shows excellent performance, including large Ron/Roff ratio, superior endurance, low operation voltage, fast switching speed, needless of a forming process, and acceptable retention characteristics. Among them, large Ron/Roff ratio (> 10(5)) and superior endurance (> 10(5) cycles) can be simultaneously achieved, and the detailed reliability test for PI-based ReRAMs has been analyzed for the first time.
Ion-Bombarded and Plasma-Passivated Charge Storage Layer for SONOS-Type Nonvolatile Memory
(2014-09-01)
Liu, Sheng-Hsien
;
Wu, Chi-Chang
;
Yang, Wen-Luh
;
Lin, Yu-Hsien
;
Chao, Tien-Sheng
This paper examined the application of ion bombardment (IB) and NH3 plasma treatment (PT) techniques in fabricating a high-performance Si3N4 charge storage layer. The IB technique can be used for creating numerous additional trap sites in the storage layer to enhance charge trapping efficiency and also causes changes in trap centroid location. In addition, the effect of centroid location on operation efficiency and reliability was investigated. Using gate-sensing and channel-sensing analysis, the changes in centroid location were demonstrated. In addition, the energy-level distribution of trap sites was clearly delineated by performing discharge-based multipulse analysis. The NH3 PT technique can substantially passivate IB-induced shallow trap sites to increase data retention time. The influence of the NH3 PT time on the memory characteristics of an IB-induced Si3N4 sample was investigated. The optimal characteristics of an ion-bombarded and plasma-passivated Si3N4 storage layer are presented. Compared with the conventional Si3N4 storage layer, the optimal ion-bombarded and plasma-passivated Si3N4 sample exhibited higher operation efficiency and superior reliability.
Novel Ion Bombardment Technique for Doping Limited Cu Source in SiOx-Based Nonvolatile Switching Layer
(2013-11-01)
Liu, Sheng-Hsien
;
Yang, Wen-Luh
;
Lin, Yu-Hsien
;
Wu, Chi-Chang
;
Chao, Tien-Sheng
A novel ion bombardment (IB) technique is presented to dope a limited Cu source in an SiOx switching layer (SiOx:Cu SL) for nonvolatile memory applications. Compared with other Cu-doping methods, this IB technique has many benefits, including a local-doping effect, room-temperature process, and compatibility with current IC manufacturing technology, besteading the 1T-1R integration. Through transmission electron microscopy and energy dispersive spectrometer analyses, an IB-induced SiOx:Cu SL is confirmed. In contrast with the conventional Cu/SiOx-stacked sample, this IB-induced SiOx:Cu SL exhibits superior performance in terms of lower forming/RESET voltages, higher uniformity of SET/RESET voltages, and more stable high-temperature retention characteristics. Additionally, so far, this IB-induced TaN/SiOx:Cu/TaN device has shown the best switching endurance properties for the general SiOx-based Cu filament resistance random access memory.
Robust Data Retention and Superior Endurance of Silicon-Oxide-Nitride-Oxide-Silicon-Type Nonvolatile Memory with NH3-Plasma-Treated and Pd-Nanocrystal-Embedded Charge Storage Layer
(2012-04-01)
Liu, Sheng-Hsien
;
Yang, Wen-Luh
;
Hsiao, Yu-Ping
;
Chao, Tien-Sheng
;
電子物理學系
In this study, we investigated an ammonia (NH3) plasma-pretreatment (PT) for suppressing the formation of interface states between metal nanocrystals (NCs) and the surrounding dielectric during the NC forming process with the aim of obtaining a highly reliable Pd NC memory. The discharge-based multipulse (DMP) technique was performed to analyze the distribution of trap energy levels in the Pd NCs/Si3N4-stacked storage layer. Through DMP analysis, it is confirmed that the NH3 PT not only significantly increases the quality of the surrounding dielectric of metal NCs but also effectively passivates shallow trap sites in the Si3N4 trapping layer. As compared with the sample without NH3 PT, the NH3-plasma-treated device exhibits better reliability characteristics such as excellent charge retention (only 5% charge loss for 10(4) s retention time) and very high endurance (no memory window narrowing after 10(5) program/erase cycles). In addition, the robust multilevel cell retention properties of the NH3-plasma-treated memory are also demonstrated. (C) 2012 The Japan Society of Applied Physics
SONOS memories with embedded silicon nanocrystals in nitride
(2008-07-01)
Liu, Mei-Chun
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Chiang, Tsung-Yu
;
Kuo, Po-Yi
;
Chou, Ming-Hong
;
Wu, Yi-Hong
We have successfully demonstrated SONOS memories with embedded Si-NCs in silicon nitride. This new structure exhibits excellent characteristics in terms of larger memory windows and longer retention time compared to control devices. Using the same thickness 2.5 nm of the bottom tunneling oxide, we found that N(2)O is better than O(2) oxide. Retention property is improved when the thickness of N(2)O is increased to 3.0 nm.
SONOS memories with embedded silicon nanocrystals in nitride by In-situ deposition method
(2008)
Wu, Yi-Hong
;
Chiang, Tsung-Yu
;
Liu, Sheng-Hsien
;
Yang, Wen-Luh
;
Chao, Tien-Sheng
In this work, we have successfully demonstrated SONOS memories with embedded Si-NCs in silicon nitride by In-situ deposition method. The self-assembly silicon nanocrystals were in-situ deposited within the Si3N4 storage layer by dissociation of dichlorosilane (SiH2Cl2) gas to a high density of 9 x 10(11) cm(-2). This new structure exhibits larger memory windows for up to 6 V, better program/erase characteristics, and excellent data retention properties as compared to control device. In addition, this novel process is simple, low cost, and compatible to the standard complementary metal-oxide-semiconductor (CMOS) processes. This technology seems to be very promising for the advanced flash memory devices.