Browsing by Author "Liu, Wen-Hao"

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A Fast Maze-Free Routing Congestion Estimator With Hybrid Unilateral Monotonic Routing
(2012)
Liu, Wen-Hao
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Li, Yih-Lang
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Koh, Cheng-Kok
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資訊工程學系
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Department of Computer Science
Considering routability issue in the early stages of VLSI design flow can avoid generating an unroutable design. Several recent routablity-driven placers [8-11] adopt a built-in global router to estimate routing congestion. While the routability of the placement solution improves, the performance of these placers degrades. Many of these built-in global router and state-of-the-art academic global routers use maze routing to seek a detoured path. Although very effective, maze routing is relatively slower than other routing algorithms, such as pattern routing and monotonic routing algorithms. This work presents two efficient routing algorithms, called unilateral monotonic routing and hybrid unilateral monotonic routing, to replace maze routing and to realize a highly fast maze-free global router that is suited to act as a built-in routing congestion estimator for placers. Experimental results indicate that RCE achieves similar routing quality when compared with [20], as well as an over 20-fold runtime speedup in large benchmarks.
Augmenting VR/AR Applications with EEG/EOG Monitoring and Oculo-Vestibular Recoupling
(2016-01-01)
Zao, John K.
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Jung, Tzyy-Ping
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Chang, Hung-Ming
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Gan, Tchin-Tze
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Wang, Yu-Te
Head-mounted virtual reality and augmented reality displays (a. k. a. VR/AR goggles) created a revolutionary multimedia genre that is seeking ever-broadening applications and novel natural human interfaces. Adding neuromonitoring and neurofeedback to this genre is expected to introduce a new dimension to user interaction with the cyber-world. This study presents the development of a Neuromonitoring VR/AR Goggle armed with electroencephalo- gram and electrooculogram sensors, programmable milli-Ampere current stimulators and wireless fog/cloud computing support. Beside of its potential use in mitigating cybersickness, this device may have potential applications in augmented cognition ranging from feedback-controlled perceptual training to on-line learning and virtual social interactions. A prototype of the device has been made from a Samsung Gear VR for S6. This study explains its technical design to ensure precision data sampling, synchronous event marking, real-time signal processing and big data cloud computing support. This study also demonstrates the effective-ness in measuring the event-related potentials during a visual oddball experiment.
Circulating miR-148b-3p and miR-409-3p as biomarkers for heart failure in patients with mitral regurgitation
(2016-11-01)
Chen, Mien-Cheng
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Chang, Tzu-Hao
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Chang, Jen-Ping
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Huang, Hsien-Da
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Ho, Wan-Chun
Background: MicroRNAs (miRs) regulate gene expression in heart failure. Circulating miRs as biomarkers for heart failure in mitral regurgitation patients (MR) remain unexplored. Methods: This case-control study enrolled 32 MR patients with heart failure, 16 asymptomatic MR patients, and 12 control subjects without heart failure. We used next generation sequencing to study the gene expression profiles in the sera, and quantitative RT-PCR to study serum and tissue miRs in the left atria. Results: Next generation sequencing analysis and enrichment analysis showed that 25 miRs were differentially expressed in the sera of MR patients with heart failure compared to control subjects. The circulating miR-148b-3p (p = 0.002) and miR-409-3p (p = 0.010) were significantly down-regulated in the MR patients with heart failure compared to control subjects. However, only circulation miR-148b-3p was significantly down-regulated in the MR patients without heart failure compared to control subjects (p = 0.009). The tissue miR-409-3p was significantly down-regulated in the MR patients with heart failure compared to 3 purchased normal controls (p = 0.041). Notably, the tissue RASGRP3 mRNA, target gene of miR-409-3p, was significantly upregulated in the MR patients with heart failure compared to normal controls (p = 0.010). The tissue FRY (p = 0.010) and GADD45A (p = 0.010) mRNAs, target genes of miR-148b-3p, were significantly up-regulated in the MR patients with heart failure compared to normal controls. Conclusions: Circulating miR-148b-3p might serve as biomarker for future development of heart failure and miR-409-3p might serve as biomarker for incident heart failure in MR patients. (C) 2016 Elsevier Ireland Ltd. All rights reserved.
Efficient Simulated Evolution Based Rerouting and Congestion-Relaxed Layer Assignment on 3-D Global Routing
(2009)
Dai, Ke-Ren
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Liu, Wen-Hao
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Li, Yih-Lang
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資訊工程學系
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Department of Computer Science
The increasing complexity of interconnection designs has enhanced the importance of research into global routing when seeking high-routability (low overflow) results or rapid search paths that report wire-length estimations to a placer. This work presents two routing techniques, namely adaptive pseudo-random net-ordering routing and evolution-based rip-up and reroute using a two-stage cost function in a high-performance congestion-driven 2-D global router. We also propose two efficient via-minimization methods, namely congestion relaxation by layer shifting and rip-up and re-assignment, for a dynamic programming-based layer assignment. Experimental results demonstrate that our router achieves performance similar to the first two winning routers in ISPD 2008 Routing Contest in terms of both routability and wire length at a 1.42X and 25.84X faster routing speed. Besides, our layer assignment yields 3.5% to 5.6% fewer vias, 2.2% to 3.3% shorter wire-length and 13% to 27% less runtime than COLA.
Exploring Regulatory Mechanisms of Atrial Myocyte Hypertrophy of Mitral Regurgitation through Gene Expression Profiling Analysis: Role of NFAT in Cardiac Hypertrophy
(2016-12-01)
Chang, Tzu-Hao
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Chen, Mien-Cheng
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Chang, Jen-Ping
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Huang, Hsien-Da
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Ho, Wan-Chun
Background Left atrial enlargement in mitral regurgitation (MR) predicts a poor prognosis. The regulatory mechanisms of atrial myocyte hypertrophy of MR patients remain unknown. Methods and Results This study comprised 14 patients with MR, 7 patients with aortic valve disease (AVD), and 6 purchased samples from normal subjects (NC). We used microarrays, enrichment analysis and quantitative RT-PCR to study the gene expression profiles in the left atria. Microarray results showed that 112 genes were differentially up-regulated and 132 genes were differentially down-regulated in the left atria between MR patients and NC. Enrichment analysis of differentially expressed genes demonstrated that "NFAT in cardiac hypertrophy" pathway was not only one of the significant associated canonical pathways, but also the only one predicted with a non-zero score of 1.34 (i.e. activated) through Ingenuity Pathway Analysis molecule activity predictor. Ingenuity Pathway Analysis Global Molecular Network analysis exhibited that the highest score network also showed high association with cardiac related pathways and functions. Therefore, 5 NFAT associated genes (PPP3R1, PPP3CB, CAMK1, MEF2C, PLCE1) were studies for validation. The mRNA expressions of PPP3CB and MEF2C were significantly up-regulated, and CAMK1 and PPP3R1 were significantly down-regulated in MR patients compared to NC. Moreover, MR patients had significantly increased mRNA levels of PPP3CB, MEF2C and PLCE1 compared to AVD patients. The atrial myocyte size of MR patients significantly exceeded that of the AVD patients and NC. Conclusions Differentially expressed genes in the "NFAT in cardiac hypertrophy" pathway may play a critical role in the atrial myocyte hypertrophy of MR patients.
Habituation of Steady-State Visual Evoked Potentials in response to High-Frequency Polychromatic Foveal Visual Stimulation
(2013)
Kuo, Heng-Yuan
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Chiu, George C.
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Zao, John K.
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Lai, Kuan-Lin
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Gruber, Allen
In an attempt to develop safe and robust methods for monitoring migraineurs\' brain states, we explores the feasibility of using white, red, green and blue LED lights flickering around their critical flicker fusion (CFF) frequencies as foveal visual stimuli for inducing steady-state visual evoked potentials (SSVEP) and causing discernible habituation trends. After comparing the habituation indices, the multi-scale entropies and the time dependent intrinsic correlations of their SSVEP signals, we reached a tentative conclusion that sharp red and white light pulses flickering barely above their CFF frequencies can replace commonly used 13Hz stimuli to effectively cause SSVEP habituation among normal subjects. Empirical results showed that consecutive short bursts of light can produce more consistent responses than a single prolonged stimulation. Since these high frequency stimuli do not run the risk of triggering migraine or seizure attacks, further tests of these stimuli on migraine patients are warranted in order to verify their effectiveness.
High-Quality Global Routing for Multiple Dynamic Supply Voltage Designs
(2011)
Liu, Wen-Hao
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Li, Yih-Lang
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Chao, Kai-Yuan
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資訊工程學系
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Department of Computer Science
Multiple dynamic supply voltage (MDSV) provides an effective way to reduce dynamic power and is widely used in high-end or low-power designs. The challenge of routing MDSV designs is that the net in MDSV designs needs to be planned carefully to avoid electrical problems or functional failure as a long interconnect path pass through the shutdown power domains. As the first work to address the MDSV global routing problem, power domain-aware routing (PDR) problem is defined and the point-to-point PDR algorithm is also presented herein with look-ahead path selection method and look-up table acceleration approach. For multi-pin net routings, a novel constant-time table-lookup mechanism by invoking four enhanced monotonic routings to fast compute the least-cost monotonic path from every node to the target sub-tree is presented to speed up the query about routing cost (including driven-length slack) to target during multi-source multi-target PDR. Experimental results confirm that the proposed MDSV-based global router can efficiently identify legally optimized routing results for MDSV designs, and can effectively reduce overflow, wire length, inserted level shifters and runtime.
Minimizing Clock Latency Range in Robust Clock Tree Synthesis
(2010)
Liu, Wen-Hao
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Li, Yih-Lang
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Chen, Hui-Chi
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資訊工程學系
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Department of Computer Science
Given the extensive study of clock skew minimization, in the ISPD 2009 Clock Network Synthesis (CNS) Contest, clock latency range (CLR) was initially minimized across multiple supply voltages under capacitance and slew constraints. CLR approximates the summation of the clock skew and the maximum source-to-sink delay variation for multiple supply voltages. This work develops an efficient three-stage clock tree synthesis flow for CLR minimization. Firstly, a balanced clock tree with small skew is generated. Secondly, buffer insertion and wire sizing minimizes delay variation without violating the slew constraint. Finally, skew is minimized by inserting snaking wires. Experimental results reveal that the proposed flow can complete all ISPD'09 benchmark circuits and yield less CLR than the top three winners of ISPD'09 CNS contest by 59%, 52.7% and 35.4% respectively. Besides, the proposed flow can also run 5.52, 1.86, and 7.54 times faster than the top three winners of ISPD'09 CNS contest respectively.
Multi-Threaded Collision-Aware Global Routing with Bounded-Length Maze Routing
(2010-01-01)
Liu, Wen-Hao
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Kao, Wei-Chun
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Li, Yih-Lang
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Chao, Kai-Yuan
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資訊工程學系
Modern global routers use various routing methods to improve routing speed and the quality. Maze routing is the most time-consuming process for existing global routing algorithms. This paper presents two bounded-length maze routing (BLMR) algorithms (optimal-BLMR and heuristic-BLMR) to perform much faster routing than traditional maze routing algorithms. The proposed sequential global router, which adopts a heuristic-BLMR, identifies less-wirelength routing results with less runtime than state-of-the-art global routers. This study also proposes a parallel multi-threaded collision-aware global router based on a previous sequential global router. Unlike the conventional partition-based concurrency strategy, the proposed algorithm uses a task-based concurrency strategy. Experimental results reveal that the proposed sequential global router uses less wirelength and runs about 1.9X to 18.67X faster than other state-of-the-art global routers. Compared to the proposed sequential global router, the proposed parallel global router yields almost the same routing quality with average 2.71and 3.12-fold speedup on overflow-free and hard-to-route benchmarks, respectively, when running on an Intel quad-core system.
NCTU-GR 2.0: Multithreaded Collision-Aware Global Routing with Bounded-Length Maze Routing
(2013-05-01)
Liu, Wen-Hao
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Kao, Wei-Chun
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Li, Yih-Lang
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Chao, Kai-Yuan
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資訊工程學系
Modern global routers employ various routing methods to improve routing speed and quality. Maze routing is the most time-consuming process for existing global routing algorithms. This paper presents two bounded-length maze routing (BLMR) algorithms (optimal-BLMR and heuristic-BLMR) that perform much faster routing than traditional maze routing algorithms. In addition, a rectilinear Steiner minimum tree aware routing scheme is proposed to guide heuristic-BLMR and monotonic routing to build a routing tree with shorter wirelength. This paper also proposes a parallel multithreaded collision-aware global router based on a previous sequential global router (SGR). Unlike the partitioning-based strategy, the proposed parallel router uses a task-based concurrency strategy. Finally, a 3-D wirelength optimization technique is proposed to further refine the 3-D routing results. Experimental results reveal that the proposed SGR uses less wirelength and runs faster than most of other state-of-the-art global routers with a different set of parameters [12], [16], [17], [20]. Compared to the proposed SGR, the proposed parallel router yields almost the same routing quality with average 2.71 and 3.12-fold speedup on overflow-free and hard-to-route cases, respectively, when running on a 4-core system.
NCTU-GR: Efficient Simulated Evolution-Based Rerouting and Congestion-Relaxed Layer Assignment on 3-D Global Routing
(2012-03-01)
Dai, Ke-Ren
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Liu, Wen-Hao
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Li, Yih-Lang
;
資訊工程學系
;
Department of Computer Science
The increasing complexity of interconnection designs has enhanced the importance of research into global routing when seeking high-routability (low overflow) results or rapid search paths that report wirelength estimations to a placer. This work presents two routing techniques, namely circular fixed-ordering monotonic routing and evolution-based rip-up and rerouting using a two-stage cost function in a high-performance congestion-driven 2-D global router. We also propose two efficient via-minimization methods, namely congestion relaxation by layer shifting and rip-up and reassignment, for a dynamic programming-based layer assignment. Experimental results demonstrate that our router achieves performance similar to the first two winning routers in ISPD 2008 Routing Contest in terms of both routability and wirelength at a 1.05 x and 18.47 x faster routing speed. Moreover, the proposed layer assignment achieves fewer vias and shorter wirelength than congestion-constrained layer assignment (COLA).
Negotiation-Based Layer Assignment for Via Count and Via Overflow Minimization
(2011)
Liu, Wen-Hao
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Li, Yih-Lang
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資訊工程學系
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Department of Computer Science
Layer assignment determines on which layer the wire or vias should be placed; and the assignment results influence the circuit's delay, crosstalk, and via counts. How to minimize via count and via overflow during layer assignment has received considerable attention in recent years. Traditional layer assignment to minimize via count tends to produce varying qualities of assignment results using different net orderings. This work develops a negotiation-based via count minimization algorithm (NVM) that can achieve lower via counts than in previous works, and experimental results indicate that net assignment ordering only slightly influences the quality of NVM's results. As for via overflow minimization, we observe via overflow can be well minimized if via overflow minimization is performed following stacked via minimization. The stacked via minimization adopts the proposed NVM, while via overflow minimization adopts a modified NVM by replacing via cost with via overflow cost. Experimental results reveal that the proposed NVM yields a lower additional via cost than [1] and [2] by 10.8%, 2.5%, respectively, in the via count minimization problem. As for via overflow minimization, the proposed two-stage algorithm improves via overflow by 11.5% and lowers the via cost by 6.5% than the one-stage algorithm [3].
Optimization of Placement Solutions for Routability
(2013)
Liu, Wen-Hao
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Koh, Cheng-Kok
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Li, Yih-Lang
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資訊工程學系
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Department of Computer Science
Routability has become a critical issue in VLSI design flow. To avoid producing an unroutable design, many placers [47] invoke global routers to get a congestion map and then move cells to reduce congestion based on this map. However, as cells move, the accuracy of the congestion map degrades, thereby affecting the effectiveness of the placer in minimizing congestions. Moreover, most global routers [8-13] ignore local congestion. If placers are guided by these routers, it may produce hard-to-route placement solutions in terms of detailed routing. This work develops a routability optimizer, called Ropt, to reduce both global and local routing congestion levels of a given placement. Based on a local-routability-aware routing model, Ropt builds a global routing instance to obtain global and local congestion information for guiding global re-placement. In addition, this work presents a new legalization scheme to preserve the global routing instance after legalization. Finally, local detailed placement further minimizes the local congestion and wirelength. For the evaluation of Ropt, we use an academic global router and a commercial router to obtain both global and detailed routing results, respectively. Experimental results reveal that Ropt can improve the routing quality (in terms of congestion, wirelength, and violation) and routing runtime of a given placement solution.
Optimizing the Antenna Area and Separators in Layer Assignment of Multi-Layer Global Routing
(2012)
Liu, Wen-Hao
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Li, Yih-Lang
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資訊工程學系
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Department of Computer Science
Traditional solutions to antenna effect, such as jumper insertion and diode insertion peformed at post-route stage may produce extra vias and degrade circuit performance. The work in [1] suggests combining layer assignment, jumper insertion and diode insertion together to achieve a better design quality with less additional cost. Based on our observations on global and local antenna violations, this work proposes a dynamic-programming based single-net layer assignment called NALAR, which first enumerates all antenna-violation-safe layer assignment solutions of a net, and then extracts the minimum-cost one for the net. NALAR can minimize via count and separators as well. In addition, an antenna avoidance layer assignment algorithm (ANLA) adopting NALAR as its kernel not only avoids global antenna violations, but also eliminates local antenna violations. Experimental results reveal that, in 11 benchmarks, ANLA can yield 5 violation-free assignments while the algorithms of other works yield no violation-free assignment. As for the total number of antenna violations in all benchmarks, this work and the works in [2], [3] and [4] yield 21, 43506, 41261 and 29671 antenna violations, respectively. However, ANLA performs about 7 times slower than other antenna-aware layer assignment [4].
Optimizing the Antenna Area and Separators in Layer Assignment of Multilayer Global Routing
(2014-04-01)
Liu, Wen-Hao
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Li, Yih-Lang
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資訊工程學系
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Department of Computer Science
Traditional solutions to antenna effect, such as jumper insertion and diode insertion performed at post-route stage may produce extra vias and degrade circuit performance. Previous work suggests combining layer assignment, jumper insertion, and diode insertion together to achieve a better design quality with less additional cost. Based on our observations on global and local antenna violations, this paper proposes an antenna-safe single-net layer assignment (AS-SLA), which first enumerates all antenna-safe layer assignment solutions of a net, and then extracts the minimum-cost one for the net. AS-SLA can minimize via count and separators as well. In addition, an antenna avoidance layer assignment flow (AALA) adopting AS-SLA as its kernel not only avoids global antenna violations, but also eliminates local antenna violations. Experimental results reveal that, in 16 benchmarks, AALA can yield ten antenna-violation-free assignments, while the algorithms of other works yield no antenna-violation-free assignment. However, AALA performs about seven times slower than other antenna-aware layer assignment algorithm. Accordingly, two acceleration techniques are proposed to reduce the runtime of AALA by 57.6%.
Optimizing the Antenna Area and Separators in Layer Assignment of Multilayer Global Routing
(2014-04-01)
Liu, Wen-Hao
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Li, Yih-Lang
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資訊工程學系
;
Department of Computer Science
Traditional solutions to antenna effect, such as jumper insertion and diode insertion performed at post-route stage may produce extra vias and degrade circuit performance. Previous work suggests combining layer assignment, jumper insertion, and diode insertion together to achieve a better design quality with less additional cost. Based on our observations on global and local antenna violations, this paper proposes an antenna-safe single-net layer assignment (AS-SLA), which first enumerates all antenna-safe layer assignment solutions of a net, and then extracts the minimum-cost one for the net. AS-SLA can minimize via count and separators as well. In addition, an antenna avoidance layer assignment flow (AALA) adopting AS-SLA as its kernel not only avoids global antenna violations, but also eliminates local antenna violations. Experimental results reveal that, in 16 benchmarks, AALA can yield ten antenna-violation-free assignments, while the algorithms of other works yield no antenna-violation-free assignment. However, AALA performs about seven times slower than other antenna-aware layer assignment algorithm. Accordingly, two acceleration techniques are proposed to reduce the runtime of AALA by 57.6%.
Routing Congestion Estimation with Real Design Constraints
(2013)
Liu, Wen-Hao
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Wei, Yaoguang
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Sze, Cliff
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Alpert, Charles J.
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Li, Zhuo
To address the routability issue, routing congestion estimators (RCE) become essential in industrial design flow. Recently, several RCEs [1-4] based on global routing engines are developed, but they typically ignore the effects of routing on timing so that the identified routing paths may be overlong and thus impractical. To be aware of the timing issues, our proposed global-routing-based RCE obeys the layer directive and scenic constraints to respectively limit the routing layers and the maximum routing wirelength of the potentially timing-critical nets. To handle the scenic constrains, we propose a novel method based on a relaxation-legalization scheme. Also, because the work in [5] reveals that congestion ratio is a better indicator than overflow to evaluate routability, this work focuses on minimizing the congestion ratio rather than overflows. As will be shown, the problem of minimizing congestion ratio is more complicated than minimizing overflows, so we develop a new rip-up and rerouting scheme to reduce congestion and further to approach a target congestion ratio. Moreover, to fit the demands of practical uses, this work presents a control utility to trade off runtime and quality, which is an essential function to an industrial RCE tool. Experiments reveal that the proposed RCE is faster and more accurate than another industrial global-routing-based RCE.
Skillfully Diminishing Antenna Effect in Layer Assignment Stage
(2014-01-01)
Lin, Chih-Chien
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Liu, Wen-Hao
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Li, Yih-Lang
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交大名義發表
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National Chiao Tung University
Antenna effect is an important issue that critically impacts the reliability and yield of integrated circuits. The dynamic-programming-based (DP-based) layer assignment method has been adopted to minimize antenna violation by enumerating all possible solutions and pruning inferior solutions. However, the complexities of modern circuits have significantly increased, likely causing the DP-based method to consume much more runtime and memory space. In this paper, we propose a skillful method to effectively Diminish Antenna effect in Layer Assignment Stage (DALAS). Unlike previous work that needs to search for separator locations and thus requires exploring much more solution space, DALAS does not need to search for separator locations and can deal with local and global antenna effects while trying to keep total via count and total overflow minimal. Experiment results show that DALAS is the first work to expel all antenna violations with similar via count to that produced by previous works [3][5] for the benchmarks in ISPD\'08 Global Routing Contest.
Topology-Aware Buffer Insertion and GPU-Based Massively Parallel Rerouting for ECO Timing Optimization
(2012)
Lin, Yen-Hung
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Lo, Yun-Jian
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Tong, Hian-Syun
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Liu, Wen-Hao
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Li, Yih-Lang
Conventional buffer insertion in timing ECO involves only minimizing the arrival time of the most critical sink in one multi-pin net and neglects the obstacles and the topology of routed wire segments, which may worsen the arrival times of other sinks and burden subsequent timing ECO. This work develops a topology-aware ECO timing optimization (TOPO) flow that comprises three phases - buffering pair scoring, edge breaking and buffer connection, and topology restructuring. TOPO effectively improves the arrival times of violation sinks without worsening those of other sinks. Experimental results indicate that TOPO improves the worst negative slack (WNS) and total negative slack (TNS) of benchmarks by an average of 79.2% and 84.3%, respectively. The proposed algorithm improves the arrival time that is achieved using conventional two-pin net-based buffer insertion by an average of 40.4%, at the cost of consuming 19x runtime. To speed up routing and further improve sink slack, a highly scalable massively parallel maze routing on Graphics Processing Unit (GPU) platform is also developed to enable the proposed flow to explore more solution candidates. High scalability and parallelism are realized by block partitioning and staggering. Experiments reveal that the proposed GPU-based parallel maze routing can achieve near 12x runtime speedup for two-pin routings. With parallelized maze routing, WNS violations in four out of five cases can be resolved.
Unraveling regulatory mechanisms of atrial remodeling of mitral regurgitation pigs by gene expression profiling analysis: role of type I angiotensin II receptor antagonist
(2015-05-01)
Chen, Mien-Cheng
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Chang, Jen-Ping
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Chang, Tzu-Hao
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Hsu, Sheng-Da
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Huang, Hsien-Da
Left atrial enlargement associated with mitral regurgitation (MR) predicts a poor prognosis. However, the underlying regulatory mechanisms of atrial remodeling remain unclear. We used high-density oligonucleotide microarrays and enrichment analysis to identify the alteration of RNA expression pattern and biological processes involved in the atrial remodeling of pigs with and without MR. Gene arrays from left atria tissues were compared in 13 pigs (iatrogenic MR pigs (n = 6), iatrogenic MR pigs treated with valsartan (n = 4), and pigs without MR (n = 3)). A total of 22 genes were differentially upregulated by altered fold change >2.0 (Log(2)FC > 1), and 49 genes were differentially downregulated by altered fold change <0.5 (Log(2)FC < -1) in the left atria of the MR pigs compared with the pigs without MR. Enrichment analysis showed that renin-angiotensin system was identified in the Kyoto Encyclopedia of Genes and Genomes pathway. Notably, 12 of the 22 upregulated genes were identified to be downregulated by valsartan and 10 of the 49 downregulated genes were identified to be upregulated by valsartan. The tissue concentrations of angiotensin II and gene expression of hypertrophic gene, myosin regulatory light chain 2, ventricular isoforms, and fibrosis-related genes were significantly increased in the MR pigs compared with pigs without MR. In conclusion, differentially expressed transcriptome and related biological pathways have been identified in the left atria of the MR pigs compared with pigs without MR. Additionally, some of the differentially expressed genes could be regulated by type I angiotensin II receptor blocker.