Browsing by Author "Liu, Xiaoyan"

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Design and Optimization Methodology for 3D RRAM Arrays
(2013)
Deng, Yexin
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Chen, Hong-Yu
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Gao, Bin
;
Yu, Shimeng
;
Wu, Shih-Chieh
3D RRAM arrays are studied at the device-and architecture-levels. The memory cell performance for a horizontal cross-point is shown experimentally to be essentially comparable to vertical pillar-around geometry. Array performances (read/write, energy, and speed) of different 3D architectures are investigated by SPICE simulation, showing horizontal stacked RRAM is superior but suffers from higher bit cost. Adopting a bi-layer pillar electrode structure is demonstrated to enlarge the array size in 3D vertical RRAM. Design guidelines are proposed for the 3D VRRAM: it shows that increasing the number of stacks of VRRAM while keeping the total bits the same, as well as scaling of feature size (F), are critical for reducing RC delay and energy consumption.
High Performance Metal-Gate/High-kappa GaN MOSFET With Good Reliability for Both Logic and Power Applications
(2016-09-01)
Yi, Shih-Han
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Ruan, Dun-Bao
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Di, Shaoyan
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Liu, Xiaoyan
;
Wu, Yung Hsien
The gate-recessed GaN MOSFET on a Si substrate is demonstrated to achieve a record highest normalized transistor current (mu C-ox) of 335 mu A/V-2 (410 mA/mm at L-G = 5 mu m and only V-G = 4 V), I-ON/I-OFF of 9 orders of magnitude, small 79 mV/dec sub-threshold slope, a low oxide/GaN interface trap density of 1.2 x 10(10) eV(-1)/cm(2), a low on-resistance of 17.0 Omega-mm, a high breakdown voltage of 720-970 V, and excellent reliability of only 40 mV Delta V-T after 175 degrees C 1000 s stress at maximum drive current. Such excellent device integrities are due to the high-kappa gate dielectric and the high conduction band offset (Delta E-C) of SiO2/GaN. From the calculation results of self-consistent Schrodinger and Poisson equations, the good reliability of GaN MOSFET is related to the confined carrier density within the GaN channel, which is in sharp contrast to the strong wave-function penetration into the high-trap density AlGaN barrier in the AlGaN/GaN HEMT.
Improvement of perovskite photoluminescence characteristics by using a lithography-free metasurface
(2018-01-01)
Chen, Wenjun
;
Sha, Jun
;
Yan, Kanghong
;
Luo, Ji
;
Xu, Ruijia
Organic-inorganic metal halid perovskite is an emerging field of promising semiconductive material in optoelectronic devices applications. It has been a research topic of interest for scientists. To date, photoluminescence (PL) efficiency of perovskite is low and does not have any literature to report the solution. Here, we proposed and demonstrated an effective approach for the improvement of perovskite PL characteristics. The PL intensity and spectra bandwidth could be enhanced significantly by using Al-disk metasurface formed on perovskite surface. Such strategy can be exploited to enhance perovskite PL characteristics for developing high efficient light emitting diodes, solar cells, and photodetectors, etc.
Metal-Gate/High-kappa/Ge nMOS at Small CET With Higher Mobility Than SiO2/Si at Wide Range Carrier Densities
(2013-02-01)
Liao, C. C.
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Ku, T. C.
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Lin, M. H.
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Zeng, Lang
;
Kang, Jinfeng
High-performance TaN/TiLaO/La2O3/SiO2/(111)-Ge nMOSFETs show high mobility of 432 cm(2)/V . s at 10(13) cm(-2) carrier density (N-s), good 1.05 junction ideality factor, and small subthreshold swing of 101 mV/dec, at a small 1.1-nm capacitance-equivalent thickness (CET). This is the first report of higher mobility in the Ge nMOSFET than SiO2/Si universal mobility at wide medium-high N-s range and small CET of 1.1 nm, which is attributed to using the (111)-Ge substrate, 30-ns laser annealing, SiO2 interfacial layer, and YbGex/n-Ge contact.