Browsing by Author "Liu, Yu-Hsuan"

Now showing 1 - 3 of 3

A High-Performance Current-Mode DC-DC Buck Converter with Adaptive Clock Control Technique
(2018-01-01)
Chiu, You-Te
;
Liu, Yu-Hsuan
;
Hung, Chung-Chih
;
電機工程學系
;
Department of Electrical and Computer Engineering
This paper presents a high-efficiency and fasttransient current-mode dc-dc buck converter using adaptive clock controller (ACC). The proposed technique can dynamically and smoothly adjust the switching frequency during the transient response to improve the undershoot, overshoot voltage, and recovery time. In this work, only an output inductor, capacitor, and feedback resistors are outside the chip. The circuit was fabricated by using 035-mu m TSMC CMOS process. The input voltage is 5V and the output voltage is 3.3V. The transient recovery time and undershoot voltage are less than 6 mu s and 60mV, respectively, for the load current change from 50mA to 300mA. The maximum conversion efficiency is 94% at 100mA load current. Above 85% conversion efficiency can be achieved for load current from 4OmA to 500mA. With the proposed techniques, the performance of the dc-dc converter is improved significantly.
Current-Voltage-Dual-Mode DC-DC Buck Converter with Adaptive Clock Control
(2019-01-01)
Chiu, You-Te
;
Liu, Yu-Hsuan
;
Tsai, Ming-Rui
;
Hung, Chung-Chih
;
電機工程學系
This paper presents a novel high-efficiency and fast-transient current-voltage-dual-mode (CVDM) dc-dc buck converter using adaptive clock controller (ACC). The proposed CVDM control can stably switch the control method between current mode and voltage mode to improve the performance according to different situations. By using the ACC technique, the circuit can dynamically and smoothly adjust the switching frequency during the transient response to improve the undershoot, overshoot voltage, and recovery time. In this work, only an output inductor, capacitor, and feedback resistors are outside the system on chip (SoC). The transient recovery time and undershoot voltage are less than 5 mu s and 60mV, respectively, for the load current change from 50mA to 500mA. The maximum conversion efficiency is 95% at 100mA load current. Above 90% conversion efficiency can be achieved for load current from 30mA to 600mA. With the proposed techniques, the performance of the dc-dc converter is improved significantly.
Traffic-Aware Beam Selection and Resource Allocation for 5G NR
(2020-01-01)
Liu, Yu-Hsuan
;
Lin, Kate Ching-Ju
;
資訊工程學系
;
Department of Computer Science
3GPP has been defining 5G New Radio (NR), a new radio access technology, to enhance flexibility, scalability, and efficiency of 5G networks. An increasing data rate can be achieved by leveraging antenna arrays to adaptively form multiple directional beams and serve geo-distributed user equipments (UEs) concurrently. However, the imperfect beam pattern of an antenna array may create side lobes, leading to inter-user interference. While most recent research focuses on beam selection that mitigates inter-user interference and maximizes the sum rate, we, however, notice that the selected beams may not be fully utilized. The root cause is that only a fixed set of beams can be configured at a time to serve a wide frequency band but some resource blocks (i.e., subcarriers) may not be able to be allocated to any UEs due to limited traffic demands. To address such inefficiency, this paper presents traffic-aware joint beam configuration and resource allocation, which explicitly considers UEs' traffic demands and configures beams that can be optimally utilized in all the RBs (i.e., the operational frequency band). Our simulation results show that our traffic-aware allocation configures beams with better utilization and achieve an effective throughput much higher than conventional maximal capacity configuration.