Browsing by Author "Lo, Chun-Chieh"

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Fabrication of IGZO Sputtering Target and Its Applications to the Preparation of Thin-film Transistor (TFT) Devices
(2010)
Lo, Chun-Chieh
;
Hsieh, Tsung-Eong
;
材料科學與工程學系
;
Department of Materials Science and Engineering
A hybrid of chemical dispersion and mechanical grinding process was developed to fabricate the mixture of nano-scale In2O3, Ga2O3 and ZnO oxide powders at the atomic ratio 1:1:2. As revealed by x-ray diffraction (XRD) analysis, sputtering target containing sole IGZO(4) phase could be obtained by sintering the oxide mixture pressed in disc form at temperatures >= 1300 degrees C for 6 hrs. The IGZO target was then transferred to a sputtering system and the thin-film transistors (TFTs) containing amorphous IGZO channels were fabricated. Post-annealing at 300 degrees C for 1 hr in air ambient was performed in order to improve the device performance. Electrical measurements indicated that the TFT samples with saturation mobility (mu(sat)) = 14.7 cm(2)/V.s, threshold voltage (V-TH) = 0.57 V, subthreshold swing (S.S.) = 0.45 V/decade and on/off ratio = 10(8) could be achieved.
Forming-free, bipolar resistivity switching characteristics of fully transparent resistive random access memory with IZO/alpha-IGZO/ITO structure
(2016-09-28)
Lo, Chun-Chieh
;
Hsieh, Tsung-Eong
;
材料科學與工程學系
;
Department of Materials Science and Engineering
Fully transparent resistive random access memory (TRRAM) containing amorphous indium gallium zinc oxide as the resistance switching (RS) layer and transparent conducting oxides (indium zinc oxide and indium tin oxide) as the electrodes was prepared. Optical measurement indicated the transmittance of device exceeds 80% in visible-light wavelength range. TRRAM samples exhibited the forming-free feature and the best electrical performance (V-SET = 0.61 V; V-RESET = -0.76 V; R-HRS/R-LRS (i.e. the R-ratio) > 10(3)) was observed in the device subject to a post-annealing at 300 degrees C for 1 hr in atmospheric ambient. Such a sample also exhibited satisfactory endurance and retention properties at 85 degrees C as revealed by the reliability tests. Electrical measurement performed in vacuum ambient indicated that the RS mechanism correlates with the charge trapping/de-trapping process associated with oxygen defects in the RS layer.
Preparation of IGZO sputtering target and its applications to thin-film transistor devices
(2012-07-01)
Lo, Chun-Chieh
;
Hsieh, Tsung-Eong
;
材料科學與工程學系
;
Department of Materials Science and Engineering
Nano-scale In2O3, Ga2O3 and ZnO powder mixture prepared by a hybrid process of chemical dispersion and mechanical grinding was adopted for the In-Ga-Zn-O (IGZO) sputtering target fabrication. A pressure-less sintering at 1300 C for 6 h yielded the target containing sole InGaZnO4 phase with relative density as high as 93%. Consequently, the thin-film transistor (TFT) devices containing amorphous IGZO channels were prepared by using the self-prepared target and the electrical measurements indicated the TFT subjected to a post annealing at 300 degrees C exhibits the best device performance with the saturation mobility = 14.7 cm(2)/V s, threshold voltage = 0.57 V, subthreshold gate swing = 0.45 V/decade and on/off ratio = 10(8). Capacitance-voltage measurement indicated that post annealing effectively suppresses the interfacial traps density at the IGZO/SiO2 interface and thus enhances the electrical performance of TFT. (C) 2012 Elsevier Ltd and Techna Group S.r.l. All rights reserved.
The Influences of Oxygen Incorporation on the Defect Trap States of a-IGZO Thin-film Transistors
(2012)
Lo, Chun-Chieh
;
Hsieh, Tsung-Eong
;
材料科學與工程學系
;
Department of Materials Science and Engineering
Thin-film transistors (TFTs) comprised of amorphous indium-gallium-zinc-oxide (a-IGZO) as the active channel layers were prepared by sputtering process at various Ar/O-2 gas flow ratios and their electrical properties were investigated. Device characterizations indicated that the TFT sample prepared at the condition of Ar/O2 ratio = 20:0.6 exhibits the best performance with field-effect mobility (mu(FE)) = 5.2 cm(2).V-1.sec(-1), threshold voltage (Vth) = 0.7 V, subthreshold gate swing (S.S.) = 0.9 V.decade(-1) and on/off ratio = 5x10(6). Such a sample also exhibited the lowest interface trap density (D-it = 2.8x10(10) eV(-1).cm(-2)) and the highest capacitance density (334 nF.cm(-2)) as revealed by capacitance-voltage (C-V) analysis and the lowest leakage current density of 25 nA/cm(2) at 10 MV/cm (in case of positive bias on top electrode) as revealed by current-voltage (I-V) measurement.