Browsing by Author "Lo, I-Hsiu"

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Device Simulation-Based Multiobjective Evolutionary Algorithm for Process Optimization of Semiconductor Solar Cells
(2013-07-03)
Li, Yiming
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Chen, Yu-Yu
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Chen, Chieh-Yang
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Shen, Cheng-Han
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Cheng, Hui-Wen
This article implements for the first time a numerical semiconductor device simulation-based multiobjective evolutionary algorithm (MOEA) for the characteristic optimization of amorphous silicon thin-film solar cells, based upon a unified optimization framework (UOF). To calculate the device's characteristic, a set of coupled solar cell transport equations consisting of the Poisson equation, the electron-hole current continuity equations, and the photo-generation model is solved numerically. Electrical characteristics, the short-circuited current, the open-circuited voltage, and the conversion efficiency are calculated to analyze the properties of the explored solar cells. The aforementioned device simulation results are used to evaluate the fitness score and access the evolutionary quality of designing parameters via the implemented non-dominating sorting genetic algorithm (NSGA-II) in the UOF. Notably, designing parameters including the material and structural parameters, and the doping concentrations are simultaneously optimized for the explored solar cells. The simulation-based MOEA methodology is useful in optimal structure design and manufacturing of semiconductor solar cells.
Dynamic Characteristic Optimization of 14 a-Si:H TFTs Gate Driver Circuit Using Evolutionary Methodology for Display Panel Manufacturing
(2011-05-01)
Li, Yiming
;
Lee, Kuo-Fu
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Lo, I-Hsiu
;
Chiang, Chien-Hshueh
;
Huang, Kuen-Yu
For thin-film transistor liquid crystal display (TFT-LCD) panel manufacturing, a gate driver circuit with amorphous silicon TFT plays an important role. In this paper, an amorphous silicon gate (ASG) driver circuit is optimized to improve circuit's dynamic characteristics. The adopted simulation-based evolutionary method integrates genetic algorithm and circuit simulator on the unified optimization framework. The circuit consisting of 14 hydrogenated amorphous silicon TFTs (a-Si: H TFTs) used in a large panel is optimized for the given specifications of the rise time < 1.5 mu s, the fall time < 1.5 mu s, and the ripple voltage < 3 V with minimizing the total layout area. By optimizing the width and passive components of the 14 devices, the results of this study successfully meet the desired specifications, where the sensitivity analysis is further conducted to verify the characteristic variation with respect to the optimized parameters. To validate the results, the optimized circuit is fabricated with 4-mu m a-Si: H TFT process, and the experimental result confirms the practicability of achieved design. The ripple voltage within 2.0 V is successfully obtained while the rise and fall times satisfy the required specifications for the fabricated sample. A 35% reduction of the optimized total devices width of a-Si: H TFTs is achieved.
Hybrid Genetic Algorithm with Mixed Mutation Mechanism for Optimal Display Panel Circuit Design
(2010-01-01)
Lo, I-Hsiu
;
Li, Yiming
;
Lee, Kuo-Fu
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電信工程研究所
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Institute of Communications Engineering
In this paper, a hybrid genetic algorithm which combines crossover operator of conventional genetic algorithm (GA) and mixed mutation mechanisms is proposed for the design and optimization of the panel gate driver circuits with amorphous silicon thin-film transistor (ASG driver circuit). The shooting local search method is applied on the first half of sorted population while the mutation of differential evolution (DE) is applied on the others after the end of crossover. This mechanism can accelerate the speed of convergence and keep the diversity in the meanwhile. For sizing of topology -given ASG driver circuits, the system which integrates proposed algorithm and circuit simulator to optimize crucial characteristics with practical constraints is implemented and tested. The results indicate that the proposed algorithm is effective and efficient, compared with conventional GA.
Modeling Bias Stress Effect on Threshold Voltage for Amorphous Silicon Thin-Film Transistors and Circuits
(2011)
Shen, Cheng-Han
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Lo, I-Hsiu
;
Li, Yiming
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電機學院
;
電子工程學系及電子研究所
In this paper, we study amorphous silicon thin-film-transistor (TFT) degradation under bias stress effect. To model threshold voltage shift with bias stress effect, fabricated samples are measured for I-V data with bias stress in variations of temperature. Rensselaer Polytechnic Institute (RPI) model is thus adopted to extract model parameters, such as the fiat band voltage (V-FB), the characteristic voltage for deep states (V-O), the conduction band mobility (MUBAND), the channel length modulation parameter (LAMBDA), the power law mobility parameter (GAMMA) and the saturation modulation parameter (ALPHASAT) from the measurement. The model card with those extracted parameters is validated via a TFT circuit simulation. The results of the circuit simulation indicate the relationship of effects depending on the stress and operational temperature.
Simulation-Based Evolutionary Approach to Electrical Characteristic Optimization of p-i-n Silicon Thin-Film Solar Cells
(2011)
Lu, Zheng-Liang
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Li, Yiming
;
Cheng, Hui-Wen
;
Lo, I-Hsiu
;
Wang, Chao-Chu
Solar cell is one of the most potent candicates for the next-generation energy technology due to its enviromental friendliness and renewable merit. Nowaday the major challenge is to lower fabrication cost while significantly enhancing the energy conversion energy. In this work, a simulator-based optimization for a-Si thin film solar cell with p-i-n structure is presented. Using genetic algorithm and electro-optical simulation, running on UOF platform, the optimal designs with respect to energy conversion efficiency, fill factor, short-circuited current density, and open-circuited voltage are obtained. Besides, the sensitivity analyses for different four cases are also conducted to investigate the degradation due to parameter variations. The best overall performance of a single layer a-Si thin film solar cell is achieved with energy conversion efficiency of 7.90% and an average efficiency is 7.35% if considers parameter variations.