Browsing by Author "Lo, WC"

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Impacts of gate structure on dynamic threshold SOI nMOSFETs
(2002-08-01)
Lo, WC
;
Chang, SJ
;
Chang, CY
;
Chao, TS
;
電子工程學系及電子研究所
The effects of different substrate-contact structures (T-gate and H-gate) dynamic threshold voltage silicon-on-insulator (SOI) nMOSFETs (DTMOS) have been investigated. It is found that H-gate structure devices have higher driving current than T-gate under DTMOS-mode operation. This is because H-gate SOI devices have larger body effect factor (gamma), inducing a lager reduction of threshold voltage. Besides, it is found that drain-induced-barrier-lowering (DIBL) is dramatically reduced for both T-gate and H-gate structure devices when devices are operated under DTMOS-mode.