Browsing by Author "Long, Shi-Bing"

Now showing 1 - 2 of 2

Band alignment of indium-gallium-zinc oxide/beta-Ga2O3((2)over-bar01) heterojunction determined by angle-resolved X-ray photoelectron spectroscopy
(2018-10-01)
Huan, Ya-Wei
;
Wang, Xing-Lu
;
Liu, Wen-Jun
;
Dong, Hong
;
Long, Shi-Bing
The energy band offsets between indium-gallium-zinc oxide (IGZO) and beta-Ga2O3 were examined by angle-resolved X-ray photoelectron spectroscopy (AR-XPS). The Ga 2p spectra from the heterojunction contributed by the upper IGZO film and the beta-Ga2O3 substrate were deconvoluted into two sub-peaks with the binding energy difference of 0.3 eV, in good agreement with the theoretical model. Meanwhile, the bandgaps of IGZO and beta-Ga2O3 were measured to be 3.44 +/- 0.1 and 4.64 +/- 0.1 eV from the ultraviolet-visible (UV-vis) transmittance spectra. The valence and conduction band offsets between the IGZO and beta-Ga2O3 were consequently determined to be 0.49 +/- 0.05 and 0.71 +/- 0.1 eV, respectively. These findings reveal that IGZO is an attractive intermediate semiconductor layer (ISL) for reducing the electron barrier height at metal/Ga2O3 interfaces. (C) 2018 The Japan Society of Applied Physics
Nonvolatile reconfigurable sequential logic in a HfO2 resistive random access memory array
(2017-05-28)
Zhou, Ya-Xiong
;
Li, Yi
;
Su, Yu-Ting
;
Wang, Zhuo-Rui
;
Shih, Ling-Yi
Resistive random access memory (RRAM) based reconfigurable logic provides a temporal programmable dimension to realize Boolean logic functions and is regarded as a promising route to build non-von Neumann computing architecture. In this work, a reconfigurable operation method is proposed to perform nonvolatile sequential logic in a HfO2-based RRAM array. Eight kinds of Boolean logic functions can be implemented within the same hardware fabrics. During the logic computing processes, the RRAM devices in an array are flexibly configured in a bipolar or complementary structure. The validity was demonstrated by experimentally implemented NAND and XOR logic functions and a theoretically designed 1-bit full adder. With the trade-off between temporal and spatial computing complexity, our method makes better use of limited computing resources, thus provides an attractive scheme for the construction of logic-in-memory systems.