Browsing by Author "Lopez, Henry"

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A 75-Gb/s/mm(2) and Energy-Efficient LDPC Decoder Based on a Reduced Complexity Second Minimum Approximation Min-Sum Algorithm
(2020-04-01)
Lopez, Henry
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Chan, Hsun-Wei
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Chiu, Kang-Lun
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Tsai, Pei-Yun
;
Jou, Shyh-Jye Jerry
This article presents a high-throughput and low-routing complexity low-density parity check (LDPC) decoder design based on a novel second minimum approximation min-sum (SAMS) algorithm. The routing congestion is mitigated by reducing the required interconnections in the critical path of the routing network. The implementation and postlayout results with 28-nm 1P9M CMOS process show that the proposed design can achieve a throughput of 10.5 Gb/s for a millimeter-wave 60-GHz baseband system while satisfying the low bit error rate (BER) requirements (10(-7)). The proposed design reduces the wiring in the routing network by 21% and improves the area by 12% compared to the conventional min-sum (MS) and normalized MS (NMS) algorithm. Additional hardware optimizations are obtained by considering the internal message passing resolution based on the BER and signal-to-noise ratio (SNR) requirements for a practical baseband system. The power consumption is efficiently reduced by the employment of a shared address generator that exploits the degree of parallelism to reduce the switching activity on a group of memory elements. The LDPC decoder is implemented with a core area of 0.14 mm(2), power consumption of 81 mW at 312.5 MHz, and the area and power efficiency of 75 Gb/s/mm(2) and 10.2 pJ/bit, respectively.
A Millimeter Wave Digital CMOS Baseband Transceiver for Wireless LAN Applications
(2019-01-01)
Chiu, Kang-Lun
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Chan, Hsun-Wei
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Lee, Wei-Che
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Wu, Chang-Ting
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Lopez, Henry
In this paper, we introduce a 10 Gbps digital baseband transceiver with IV supply voltage, 16-QAM, 3/4 code rate single carrier mode using 28 nm CMOS process to do the implementation. In millimeter wave communications, well-defined standard, IEEE 802.11ad is referenced for our system design and simulation. We target at modified chip rate 2.5 GHz with 4 times parallelism hardware at clock rate 625 MHz. The overall transceiver architecture design with hardware implementation considerations will be proposed. With the smart shared memory allocation, we can reduce 31% of the total amount. According to the referenced specifications, we achieve the required bit error rate 3 x 10(-7) before SNR 18.5 dB. After the system algorithm design, we implement the hardware with the core area 2.92 mm(2) with measured power 1.8 Watt for baseband transceiver chip. The performance of energ,y per bit is 0.023 nJ and 0.211 nJ per hit 6w Tx and Rx, including ADC/DAC.
A MMSE Joint Feedback Feed-forward Equalizer for FBMC-OQAM Baseband Receiver in the 60 GHz Band
(2017-12-01)
Liu, Chun-Yi
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Leong, Edmund Wen Jen
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Wu, Chang-Ting
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Sie, Meng-Siou
;
Lopez, Henry
In this paper, a minimum mean square error (MMSE) joint feedback feed-forward equalizer (MJFFE) is proposed to deterministically suppress the inter-symbol interference and inter-carrier interference that arose from the filter bank multi-carrier in a long multipath channel of the 60-GHz indoor wireless transmission. The decision device is discarded in the decision feedback loop to reduce error propagation while at the same time applying the MMSE criterion to prevent over compensation influenced by additive white Gaussian noise. As a result, in an non-line-of-sight (NLOS) channel with 7.65-ns rms delay spread, a 3-tap MJFFE provides 3-dB improvement at the bit error rate (BER) 10(-2) crossing and improve error floor effect at the BER 10(-3) crossing, as compared with the 1-tap zero-forcing equalizer. Furthermore, the proposed equalizer coefficients calculation based on linear convolution for the MJFFE is also presented. The hardware complexity achieves 50% reduction by using several methods including multiplexing, memory sharing, and computation element sharing.
An 8X-Parallelism Memory Access Reordering Polyphase Network for 60 GHz FBMC-OQAM Baseband Receiver
(2016-12-01)
Liu, Chun-Yi
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Sie, Meng-Siou
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Leong, Edmund Wen Jen
;
Yao, Yu-Cheng
;
Lopez, Henry
Filter bank multi-carrier (FBMC) is a kind of new waveform that is an important topic in 5th generation wireless systems (5G). In this paper, we propose a novel memory access reordering polyphase network (PPN) for FBMC offset QAM (OQAM) system at 60 GHz band. The novel PPN architecture has lower complexity than the state-of-the-art designs, and it can be used in any FBMC-OQAM baseband design. To evaluate the system performance and hardware complexity of baseband receiver in millimeter wave (mmW) band, the proposed PPN is integrated into our 8X-parallelism 60 GHz band baseband receiver. The out-of-band (OOB) radiation in fixed-point simulation has 25 dB improvement as compared with OFDM. Furthermore, the transmission efficiency of FBMC-OQAM baseband receiver can improve 52% due to using more data subcarriers and removal of cyclic prefix (CP). The proposed PPN is synthesized with 40 nm 1P9M general purposes (GP) process, and can operate at 330/500 MHz clock rate with power consumption of 17/26 mW, providing the maximum PHY data rate up to 21.4 Gb/s.
An 8X-Parallelism Memory Access Reordering Polyphase Network for 60 GHz FBMC-OQAM Baseband Receiver
(2016-12)
Liu, Chun-Yi
;
Sie, Meng-Siou
;
Leong, Edmund Wen Jen
;
Yao, Yu-Cheng
;
Lopez, Henry
Filter bank multi-carrier (FBMC) is a kind of new waveform that is an important topic in 5th generation wireless systems (5G). In this paper, we propose a novel memory access reordering polyphase network (PPN) for FBMC offset QAM (OQAM) system at 60 GHz band. The novel PPN architecture has lower complexity than the state-of-the-art designs, and it can be used in any FBMC-OQAM baseband design. To evaluate the system performance and hardware complexity of baseband receiver in millimeter wave (mmW) band, the proposed PPN is integrated into our 8X-parallelism 60 GHz band baseband receiver. The out-of-band (OOB) radiation in fixed-point simulation has 25 dB improvement as compared with OFDM. Furthermore, the transmission efficiency of FBMC-OQAM baseband receiver can improve 52% due to using more data subcarriers and removal of cyclic prefix (CP). The proposed PPN is synthesized with 40 nm 1P9M general purposes (GP) process, and can operate at 330/500 MHz clock rate with power consumption of 17/26 mW, providing the maximum PHY data rate up to 21.4 Gb/s.
Digital Self-Interference Cancellation for OFDM Full-Duplex Transmission in 60 GHz Band
(2018-01-01)
Jen, Chih-Wei
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Yang, Hung-Wei
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Chan, Hsun-Wei
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Liu, Hung-Chih
;
Lopez, Henry
In this paper, we proposed an all-digital selfinterference cancellation (DSIC) with correction vector for convolution (CVC) technique to eliminate serious multipath self-interference for orthogonal frequency-division multiplexing (OFDM) full-duplex transmission in 60 GHz band. The CVC can solve the non-equivalence of circular and linear convolution. This work based on IEEE 802.15.3c/IEEE 802.11ad specification is synthesized with 40 nm 1P9M general purposes process. Under the Access Point (AP) and the User Equipment (UE) horn antennas being aligned face to face, the 9-bit fixed-point simulation result shows the proposed technique can achieve the target of the uncoded bit-error-rate (BER) of 10-2 at signal-to-noise ratio (SNR) of 24.8 dB satisfying the requirement of 26 dB.
Residual Sampling Clocking Offset Estimation and Compensation for FBMC-OQAM Baseband Receiver in the 60 GHz Band
(2017-01-01)
Liu, Chun-Yi
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Yao, Yu-Cheng
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Sie, Meng-Siou
;
Leong, Edmund Wen Jen
;
Lopez, Henry
In this paper, we propose a tracking mechanism for the residual sampling clocking offset (SCO) with corresponding pilot and auxiliary pilot arrangements for filter bank multi-carrier (FBMC) offset QAM (OQAM) baseband receiver in the 60 GHz band. This work can effectively compensate the non-ideal effects on the high-band subcarriers while using more data subcarrier for increasing bandwidth efficiency. This work is designed based on IEEE 802.15.3c and IEEE 802.11ad standards and synthesized with 40 nm 1P9M general purposes (GP) process. The proposed SCO tracking module with the proposed alternated pilot and auxiliary pilot arrangement can improve the BER floor and reach to 10(-2) at SNR of 22 dB which is only 1.75 dB more than that of no SCO effect in 64-QAM modulation.