Browsing by Author "Lu, SH"

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Comparison of oxide breakdown progression in ultra-thin oxide SOI and bulk pMOSFETs
(2004)
Chan, CT
;
Kuo, CH
;
Tang, CJ
;
Chen, MC
;
Wang, TH
Accelerated oxide breakdown progression in ultra-thin oxide (1.4nm) SOI pMOSFETs is observed, as compared to bulk devices. The accelerated progression is explained by the increase of hole stress current as a result of breakdown induced channel carrier heating in a floating-body configuration. Numerical simulation of hole tunneling current and hot carrier luminescence measurement are carried out to justify the proposed theory.
High resolution planar encoder by retro-reflection
(2005-08-01)
Kao, CF
;
Lu, SH
;
Lu, MH
;
光電工程學系
;
Department of Photonics
This investigation presents a planar diffractive laser encoder system (PDLENS), which serves as a two-dimensional (2D) position detection apparatus for precision machine applications. Traditional 2D position detection utilizes a pair of linear encoders in crossed construction and so maintaining the perpendicularity between this pair of encoders is difficult. Besides, the rigorous alignment requirements among various components of the encoder system impose a serious user adaptation bottleneck. Of all alignment tolerances, the head-to-scale alignment tolerance is the most important problem for applications. In this work, a 2D grating is employed as the scale and the PDLENS is based on the retro-reflection configuration. Therefore the new encoder can provide good perpendicularity and tolerate larger alignment errors than the conventional encoder does. The grating pitch is 1.6 mu m and the period of the output signal is 0.4 mu m due to the double diffraction. Electronic interpolation with a factor of 400 leads to a readout resolution of 1 nm. The new encoder and a capacitive sensor were employed to simultaneously measure a circular motion with a radius of 1 mu m generated by a piezo stage. Comparing the measured positions, the deviation is less than 30 nm and the repeatability is better than 8 nm. (c) 2005 American Institute of Physics.
Negative substrate bias enhanced breakdown hardness in ultra-thin oxide pMOSFETs
(2003)
Wang, TH
;
Tsai, CW
;
Chen, MC
;
Chan, CT
;
Chiang, HK
Negative substrate bias enhanced breakdown hardness in ultra-thin oxide (1.4nm) pMOS is observed. This result is believed due to the increase of hole stress current during breakdown progression via breakdown induced carrier heating. Numerical analysis of substrate bias effect on hole tunneling current is performed to support the proposed theory. This phenomenon is particularly significant to gate oxide reliability in floating substrate (PD-SOI) or forward-biased substrate devices.