Browsing by Author "Luo, Guangli"

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Architecture of a n-type metal-oxide-semiconductor transistor with a compressive strained silicon-germanium channel fabricated on a silicon (110) substrate
(2007-09-06)
Luo, Guangli
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Chien, Chao-Hsin
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Yang, Tsung-Hsi
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Chang, Chun-Yen
The present invention discloses an architecture of a NMOS transistor with a compressive strained Si—Ge channel fabricated on a silicon (110) substrate, which comprises: a p-silicon (110) substrate, two n+ ion-implanted regions functioning as the source and the drain respectively, a compressive strained Si—Ge channel layer, and a gate structure. The compressive strained Si—Ge channel layer is grown on the p-silicon (110) substrate to reduce the electron conductivity effective mass in the [1_l -10] crystallographic direction and to promote the electron mobility in the [1-10] crystallographic direction. Thus, the present invention can improve the electron mobility of a NMOS transistor via the channels fabricated on the silicon (110) substrate. Further, the NMOS transistor of the present invention can combine with a high-speed PMOS transistor on a silicon (110) substrate to form a high-performance CMOS transistor on the same silicon (110) substrate.
Growth behaviour of Ge nano-islands on the nanosized Si{111} facets bordering on two {100} planes
(2006-10-28)
Ferng, Shyh-Shin
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Yang, Tsung-Hsi
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Luo, Guangli
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Yang, Kai-Ming
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Hsieh, Ming-Feng
Si( 100) substrates were used to fabricate various nanosized {111} facets between the ( 100) planes using photolithography and anisotropic wet chemical etching. Following simultaneous Ge chemical vapour deposition on the neighbouring ( 100) and {111} facets, the Ge nano-island formation and distribution was observed on both the ( 100) terraces and the {111} side walls using a dynamical atomic force microscope. The nano-island formation on the nanosized {111} strip facets was found to be strongly suppressed upon reducing the strip width due primarily to the interaction of adatoms on the neighbouring facets. Specifically, the difference in the effective chemical potential of Ge adatoms on the two neighbouring facets leads to the depletion of nano-islands on the {111} strip with width < 500 nm under the growth condition used in this study.
Growth of GaAs epitaixial layers on Si substrate by using a novel GeSi buffer layer
(2005-02-03)
Chang, Edward Y.
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Luo, Guangli
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Yang, Tsung Hsi
;
Chang, Chung Yen
This invention provides a process for growing Ge epitaixial layers on Si substrate by using ultra-high vacuum chemical vapor deposition (UHVCVD), and subsequently growing a GaAs layer on Ge film of the surface of said Ge epitaixial layers by using metal organic chemical vapor deposition (MOCVD). The process comprises steps of, firstly, pre-cleaning a silicon wafer in a standard cleaning procedure, dipping it with HF solution and prebaking to remove its native oxide layer. Then, growing a high Ge-composition epitaixial layer, such as Si0.1Ge0.9 in a thickness of 0.8 μm on said Si substrate by using ultra-high vacuum chemical vapor deposition under certain conditions. Thus, many dislocations are generated and located near the interface and in the low of part of Si0.1Ge0.9 due to the large mismatch between this layer and Si substrate. Furthermore, a subsequent 0.8 μm Si0.05Ge0.95 layer, and/or optionally a further 0.8 μm Si0.02Ge0.98 layer, are grown. They form strained interfaces of said layers can bend and terminate the propagated upward dislocation very effectively. Therefore, a film of pure Ge is grown on the surface of said epitaixial layers. Finally, a GaAs epitaixial layer is grown on said Ge film by using MOCVD.
Growth of GaAs expitaxial layers on Si substrate by using a novel GeSi buffer layer
(2007-06-14)
Chang, Edward Y.
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Luo, Guangli
;
Yang, Tsung-Hsi
;
Chang, Chun-Yen
This invention provides a process for growing Ge epitaixial layers on Si substrate by using ultra-high vacuum chemical vapor deposition (UHVCVD), and subsequently growing a GaAs layer on Ge film of the surface of said Ge epitaixial layers by using metal organic chemical vapor deposition (MOCVD). The process comprises steps of, firstly, pre-cleaning a silicon wafer in a standard cleaning procedure, dipping it with HF solution and prebaking to remove its native oxide layer. Then, growing a high Ge-composition epitaixial layer, such as Si0.1Ge0.9 in a thickness of 0.8 μm on said Si substrate by using ultra-high vacuum chemical vapor deposition under certain conditions. Thus, many dislocations are generated and located near the interface and in the low of part of Si0.1Ge0.9 due to the large mismatch between this layer and Si substrate. Furthermore, a subsequent 0.8 μm Si0.05Ge0.95 layer, and/or optionally a further 0.8 μm Si0.02Ge0.98 layer, are grown. They form strained interfaces of said layers can bend and terminate the propagated upward dislocation very effectively. Therefore, a film of pure Ge is grown on the surface of said epitaixial layers. Finally, a GaAs epitaixial layer is grown on said Ge film by using MOCVD.