Browsing by Author "Luo, Ren-Guo"

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A Network-Flow Based Algorithm For Power Density Mitigation at Post-Placement Stage
(2013-01-01)
Liu, Sean Shih-Ying
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Luo, Ren-Guo
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Chen, Hung-Ming
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電子工程學系及電子研究所
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Department of Electronics Engineering and Institute of Electronics
In this paper, we propose a power density mitigation algorithm at post-placement stage. Our proposed framework first identifies cluster of bins with high temperature, then propagates power density away from high temperature region by balancing regional power density. The problem of balancing regional power density is modeled as a supply-demand problem and solution is obtained with minimal displacement of cells. An analytical temperature profiling algorithm is tightly integrated within the framework to constantly update the temperature profile in response to incremental perturbation to placement. Our proposed approach can effectively reduce maximum temperature compared to previous works on temperature mitigation.
Fast Thermal Aware Placement With Accurate Thermal Analysis Based on Green Function
(2014-06-01)
Liu, Sean Shih-Ying
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Luo, Ren-Guo
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Aroonsantidecha, Suradeth
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Chin, Ching-Yu
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Chen, Hung-Ming
In this paper, we present a fast and accurate thermal aware analytical placer. A thermal model is constructed based on a Green function with discrete cosine transform (DCT) to generate full chip temperature profile. Our thermal model is tightly integrated with an analytical placer implemented based on the SimPL framework. A temperature spreading force based on the Gaussian model is proposed to reduce the maximum on-chip temperature and optimize tradeoff between total half-perimeter wirelength and on-chip maximum temperature. The temperature profile generated using our thermal model is verified by the ANSYS ICEPAK and obtains an average deviation within 3.0% with 240x speedup.