Browsing by Author "McAlister, Sean P."

Now showing 1 - 3 of 3

Comparison of MONOS memory device integrity when using Hf(1-x-y)N(x)O(y) trapping layers with different N compositions
(2008-06-01)
Yang, H. J.
;
Cheng, C. F.
;
Chen, W. B.
;
Lin, S. H.
;
Yeh, F. S.
We have studied the nitrogen composition dependence of the characteristics of TaN/HfLaON/Hf(1-x-y)N(x)O(y)/ SiO(2)/Si MONOS memory devices. By increasing the N composition in the Hf(1-x-y)N(x)O(y) trapping layer, both the memory window And high-temperature retention improved. The Hf(0.3)N(0.2)O(0.5) MONOS device displayed good characteristics in terms of its +/-9-V program/erase (P/E) voltage, 100-mu s P/E speed, large initial 2.8-V memory window, and a ten-year extrapolated retention of 1.8 V at 85 degrees C or 1.5 V at 125 degrees C.
High-performance SrTiO3 MIM capacitors for analog applications
(2006-09-01)
Chiang, K. C.
;
Huang, Ching-Chien
;
Chen, G. L.
;
Chen, Wen Jauh
;
Kao, H. L.
TAN/SrTiO3/TaN capacitors with a capacitance density of 28-35 fF/mu m(2) have been developed by using a high-kappa (kappa = 147-169) SrTiO3 dielectric containing nanometersized microcrystals (3-10 nm). A small capacitance effective thickness was achieved by reducing the interfacial TaON using N+ treatment on the lower TaN electrode during post-deposition annealing. The small (92 ppm/V-2) voltage coefficient of the capacitance and the 3 x 10(-8) A/cm(2) leakage current at 2 V exceed the International Technology Roadmap for Semiconductors' requirements for analog capacitors at year 2018.
Improving the retention and endurance characteristics of charge-trapping memory by using double quantum barriers
(2008-07-01)
Lin, S. H.
;
Yang, H. J.
;
Chen, W. B.
;
Yeh, F. S.
;
McAlister, Sean P.
We have studied the performance of double-quantum-barrier [TaN - Ir(3)Si] - [HfAlO - LaAlO(3)] - Hf(0.3)N(0.2)O(0.5) - [HfAlO - SiO(2)]-Si charge-trapping memory devices. These devices display good characteristics in terms of their +/- 9-V program/erase (P/E) voltage, 100-mu s P/E speed, initial 3.2-V memory window, and ten-year extrapolated data retention window of 2.4 V at 150 degrees C. The retention decay rate is significantly better than single-barrier MONOS devices, as is the cycled retention data, due to the reduced-interface trap generation.