Browsing by Author "Niu, Dow-Chih"

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77-110 GHz 65-nm CMOS Power Amplifier Design
(2014-05-01)
Wu, Kun-Long
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Lai, Kuan-Ting
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Hu, Robert
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Jou, Christina F.
;
Niu, Dow-Chih
This paper details the development of our millimeter-wave wideband power amplifier design. By treating the power combiner as an impedance transformer which allows different loading impedance to be taken into account, a compact wideband power-combining network can be constructed. With small transmission-line attenuation being sustained and maximum output power easily extracted from the transistors over the 77-110 GHz frequency range, a power amplifier can then be designed using 65-nm CMOS process to cover the whole W-band. In the on-wafer measurement, the gain is around 18 dB, the output reflection coefficients is below -10 dB, and the output-referred 1 dB compression point can reach 12 dBm at 1.2 V bias condition; when the bias is increased to 2.5 V, a 18 dBm output power is recorded. To our knowledge, this is the first CMOS power amplifier that covers the whole W-band.
77-110GHz 90nm-CMOS Receiver Design
(2013)
Yu, Jo-Han (Judy)
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Liao, Chien-Hsiung
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Hsieh, Cheng-Huang
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Hu, Robert
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Niu, Dow-Chih
This manuscript details our latest 90nm CMOS W-band receiver design where the RF LNA, resistive mixer, IF differential amplifier and LO tripler have been integrated, thus allows the whole 77-110GHz spectrum to be down-converted into quasi-DC-33GHz using a much lower microwave frequency. In addition to being used in our broadband receiver array project, this W-band circuit is also eligible for the conventional 77/94GHz vehicular and surveillance applications. This 90nm-CMOS receiver with LO tripler has around -0.4dB conversion gain, 18dB noise figure, 48dB LO-IF isolation, and its chip size is 950-times-750um(2), with 114mW power dissipation at 1.3V DC bias.
A 1.5 to 37 GHz ultra-broadband MMIC Mouw's star mixer
(2005)
Chang, Chi-Yang
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Liao, Ching-Ku
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Niu, Dow-Chih
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電信工程研究所
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Institute of Communications Engineering
A MMIC ultra-broadband star mixer using Mouw's hybrid junction is presented in this paper. The MMIC chip uses 0.15 mu m HEMT process. The chip is measured in three mounting environments, namely, absorber backed, 15 mil Al(2)O(3) substrate plus absorber, and conductor backed and all of them show ultra-broadband performances. The measured results show that the bandwidth is from 1.5 to 37 GHz except a resonant dip near. 23 GHz occurs in conductor backed case.. The IF 3 dB bandwidth is from DC to 2.5 GHz. The chip can be used as either up- or down-converter. Because the spiral layout of the Mouw's hybrid junction shrinks the area significantly, no off chip baluns are required. The chip size is 2 mm by 2 mm.
A 10-110 GHz fundamental/harmonic rat-race mixer
(2007)
Chi, Chun-Hsiang
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Wu, Chung-Hung
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Wang, Wei-Ting
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Lai, Chi-Hau
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Niu, Dow-Chih
This paper describes a broadband 10-110GHz mm-wave rat-race ring diode mixer. The mixer can be used as a fundamental mixer as well as a harmonic mixer. The finite-ground-width CPW on a 15mil alumina substrate is used to implement the circuit. The mixer is designed to allow DC bias that a local power as low as 0dBm could properly pump the mixer. Two commercial available M/A-Com MA4E2037 GaAs beam-leaded Schottky diodes are used. The measured conversion loss is typically 9dB from 10 to 100GRz in the fundamental mixing mode and 15dB from 20 to 110GRz in the harmonic mixing mode.
The Design of 40 GHz Active Power Splitter
(2012)
Huang, Ching-Ying
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Niu, Dow-Chih
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Hu, Robert
;
Jou, Christina F.
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電機學院
Based on the idea of distributed amplifier, a wideband active power divider is designed using 90 nm CMOS process to provide positive gain and superb isolation between its two output ports from quasi-DC up to 40 GHz. Compared with our previously demonstrated 20 GHz one, the requirement of good input matching over the whole bandwidth poses an even severe constraint in the development of this 40 GHz active power splitter, as the tradeoff between gain and bandwidth becomes more intricate now. Mutual-coupling inductors are therefore adopted in the circuit's artificial transmission line to improve both the input return loss and allow the use of larger transistors in the gain stage. The fabricated circuit exhibits good input and output matching and has better than 10 dB output-port isolation across the whole band, with the bias of 1.8 V and 190 mA. Related circuit theories and mathematics will also be presented in this paper.