Browsing by Author "Ou, SH"

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Lightweight arithmetic units for VLSI digital signal processors
(2005)
Ou, SH
;
Lin, TJ
;
Lin, HY
;
Chao, CM
;
Liu, CW
This paper presents a lightweight arithmetic for embedded signal processing, whose hardware complexity is similar to that of the integer one. In our simulations, its 16-bit version has 40.18dB signal to round-off error ratio over the IEEE single-precision floating-point arithmetic, which even out-performs the hand-optimized 32-bit code with integer arithmetic.
Pipelining technique for energy-aware datapaths
(2005)
Huang, WS
;
Lin, TJ
;
Ou, SH
;
Liu, CW
;
Jen, CW
This paper presents a novel method to improve the energy awareness of the pipelined datapaths for varying throughputs. It activates the pipeline registers only when necessary; i.e. a data item can bypass the pipeline registers when the operation is free of race from the succeeding one, and when the glitch is minimal. Then, the clock pulses of the unused pipeline registers are gated to reduce the energy dissipation. Compared to the conventional clock gating approach, our proposed on-demand pipelining eliminates all redundant clock pulses whenever the peak datarate is not reached. Moreover, our method has a constant input-to-output latency for all operation modes, which significantly simplifies the integration tasks. In our simulations, the proposed on-demand pipelining saves up to 80% energy of conventional pipelined datapaths, and it can reduce about 34%-39% energy dissipation of those with gated-clock only.