Browsing by Author "Pan, Gung-Yu"

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A Learning-on-Cloud Power Management Policy for Smart Devices
(2014)
Pan, Gung-Yu
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Lai, Bo-Cheng Charles
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Chen, Sheng-Yen
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Jou, Jing-Yang
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電子工程學系及電子研究所
Energy consumption poses severe limitations for smart devices, urging the development of effective and efficient power management policies. State-of-the-art learning-based policies are autonomous and adaptive to the environment, but they are subject to costly computational overhead and lengthy convergence time. As smart devices are connected to Internet, this paper proposes the Learning-on-Cloud (LoC) policy to exploit cloud computing for power management. Sophisticated learning engines are offloaded from local devices to the cloud with minimal communication data, thus the runtime overhead is reduced. The learning data are shared between many devices with the same model, hence the convergence rate is raised. With one thousand devices connecting to the cloud, the LoC agent is able to converge within a few iterations; the energy saving is better than both of the greedy and the learning-based policies with less latency penalty. By implementing the LoC policy as an Android App, the measured overhead is only 0.01% of the system time.
A Read-Write Aware DRAM Scheduling for Power Reduction in Multi-Core Systems
(2014-01-01)
Lai, Chih-Yen
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Pan, Gung-Yu
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Kuo, Hsien-Kai
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Jou, Jing-Yang
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電子工程學系及電子研究所
The demand of high performance and low power has increased the importance of power efficiency in multi-core systems. In modern multi-core architectures, DRAM has dominated the power consumption and therefore reordering based DRAM scheduling has been intensively studied to reduce the power. However, the benefit of reordering is not fully explored by the previous studies. To further reduce the power, this paper proposes the read-write reordering and the read-write aware throttling. When compared to the existing work, the proposed techniques reduce 10% more DRAM power with less performance degradation.
An Interdigitated Non-Contact ECG Electrode for Impedance Compensation and Signal Restoration
(2015-01-01)
Lin, Jeng-Hau
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Liu, Hao
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Liu, Chia-Hung
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Lam, Phillip
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Pan, Gung-Yu
This paper presents a non-contact electrocardiogram (ECG) measurement platform that compensates for motion-induced impedance changes via interdigitated electrode channels in concert with software reconstruction algorithms. Specifically, the impedance of the non-contact electrode is non-invasively acquired in real-time by exploiting a custom electrode designed with two independent channels featuring independent transfer functions that are used to reconstruct motion-compensated ECG waveforms. The developed platform is validated on human subjects, illustrating up to a 76.3% improvement over conventional approaches, paving the path towards comfortable, convenient, and robust non-contact electrophysiological sensing.
Power-Efficient Instancy Aware DRAM Scheduling
(2015-04-01)
Pan, Gung-Yu
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Lai, Chih-Yen
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Jou, Jing-Yang
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Lai, Bo-Cheng Charles
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電子工程學系及電子研究所
Nowadays, computer systems are limited by the power and memory wall. As the Dynamic Random Access Memory (DRAM) has dominated the power consumption in modern devices, developing power-saving approaches on DRAM has become more and more important. Among several techniques on different abstract levels, scheduling-based power management policies can be applied to existing memory controllers to reduce power consumption without causing severe performance degradation. Existing power-aware schedulers cluster memory requests into sets, so that the large portion of the DRAM can be switched into the power saving mode; however, only the target addresses are taken into consideration when clustering, while we observe the types (read or write) of requests can play an important role. In this paper, we propose two scheduling-based power management techniques on the DRAM controller: the inter-rank read-write aware clustering approach greatly reduces the active standby power, and the intra-rank read-write aware reordering approach mitigates the performance degradation. The simulation results show that the proposed techniques effectively reduce 75% DRAM power on average. Compared with the existing policy, the power reduction is 10% more on average with comparable or less performance degradation for the proposed techniques.
Scalable Global Power Management Policy Based on Combinatorial Optimization for Multiprocessors
(2015-12-01)
Pan, Gung-Yu
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Yang, Jed
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Jou, Jing-Yang
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Lai, Bo-Cheng Charles
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交大名義發表
Multiprocessors have become the main architecture trend in modern systems due to the superior performance; nevertheless, the power consumption remains a critical challenge. Global power management (GPM) aims at dynamically finding the power state combination that satisfies the power budget constraint while maximizing the overall performance (or vice versa). Due to the increasing number of cores in a multiprocessor system, the scalability of GPM policies has become critical when searching satisfactory state combinations within acceptable time. This article proposes a highly scalable policy based on combinatorial optimization with theoretical proofs, whereas previous works take exhaustive search or heuristic methods. The proposed policy first applies an optimum algorithm to construct a state combination table in pseudo polynomial time using dynamic programming. Then, the state combination is assigned to cores with minimum transition cost in linear time by mapping to the network flow problem. Simulation results show that the proposed policy achieves better system performance for any given power budget when compared to the state-of-the-art heuristic. Furthermore, the proposed policy demonstrates its prominent scalability with 125 times faster policy runtime for 512 cores.
Scalable Power Management Using Multilevel Reinforcement Learning for Multiprocessors
(2014-08-01)
Pan, Gung-Yu
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Jou, Jing-Yang
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Lai, Bo-Cheng
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交大名義發表
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National Chiao Tung University
Dynamic power management has become an imperative design factor to attain the energy efficiency in modern systems. Among various power management schemes, learning-based policies that are adaptive to different environments and applications have demonstrated superior performance to other approaches. However, they suffer the scalability problem for multiprocessors due to the increasing number of cores in a system. In this article, we propose a scalable and effective online policy called MultiLevel Reinforcement Learning (MLRL). By exploiting the hierarchical paradigm, the time complexity of MLRL is O(n lg n) for n cores and the convergence rate is greatly raised by compressing redundant searching space. Some advanced techniques, such as the function approximation and the action selection scheme, are included to enhance the generality and stability of the proposed policy. By simulating on the SPLASH-2 benchmarks, MLRL runs 53% faster and outperforms the state-of-the-art work with 13.6% energy saving and 2.7% latency penalty on average. The generality and the scalability of MLRL are also validated through extensive simulations.