Browsing by Author "Pandey, Rajeev Kumar"

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A HIGHLY EFFICIENT AND ADAPTIVE SOLAR-ENERGY HARVESTING CIRCUIT FOR BATTERYLESS IOT DEVICES
(2018-01-01)
Yang, Ching-Cheng
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Chao, Paul C. -P.
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Pandey, Rajeev Kumar
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電子工程學系及電子研究所
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Department of Electronics Engineering and Institute of Electronics
In this paper a new on-chip 2nd generation solar energy harvesting DC-DC converter has been proposed for a battery less Internet of Things (IoTs) Devices. The propose circuit is design to maximize the transfer efficiency and stability as well as enough high power supply to the back-end loads. Altogether the proposed circuit consists of a cross-coupled charge pump, a maximum power point tracking (MPPT) circuit, a timing control circuit and regulator. The range of input voltage is from 0.5V to 3V. Required boosted output voltage is in the range of 1V to 3.3V. The maximum transfer efficiency is more than 60% and the maximum throughout power is 20011W. A gated clock frequency modulation circuit has been designed and employed in the maximum power point tracking (MPPT) unit to lock the input resistance of the charge pump. In addition, to provide a stable voltage to the load a low dropout (LDO) regulator circuit is used. The experimental results show that the maximum power conversion efficiency (PCE) is 78% at 52 W input power condition.
A low-power reference-less clock/data recovery for visible light communication devices requiring low data throughput
(2020-01-01)
Liu, Ming-Cheng
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Pribadi, Eka Fitrah
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Chao, Paul C-P
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Pandey, Rajeev Kumar
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電子工程學系及電子研究所
In this study a reference-less clock and data recovery (CDR) is designed and developed for the low speed visible light communication system based Internet of Things (IoT) tags. Design system incorporates an off-chip photodiode and an integrated-on chip front-end receiver with the reference-less CDR. For an IoT tags low power consumption, low supply voltage, and small area are the major design constraint. Considering these constraints, the circuit of the front-end receiver incorporate the near-threshold cascode current mirror based transimpedance amplifier, low pass filter and a comparator. On the other-hand, low power all-digital phase locked loop-based reference-less CDR is design herein with a modified loop filter, auto tune digital control oscillator and auto duty cycle adjustment circuit. The circuit is implemented in an integrated chip with area of 0.728 mm(2) via TSMC 180 nm process. Experimental measurement results of the tapeout chip shows that the phase noises are - 39.54 dBc/Hz @ 1 kHz, - 80.35 dBc/Hz @ 10 kHz and - 92.26 dBc/Hz @ 100 kHz. The measured jitter in the recovered clock is 3.312 ns (0.0033 UI). At 1 Mbps, the measured total power consumption is 5.58 mu W. The achieve results shows that the implemented circuit in this study highly support the commercial low data rate based optical wireless sensing nodes for IoT tags.
A New Adaptive Readout System For a New OLED OPD Flexible Patch PPG Sensor
(2019-01-01)
Pandey, Rajeev Kumar
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Pribadi, Eka Fitrah
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Chao, Paul C. -P
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電機資訊國際學位學程
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EECS International Institute
This study proposes a new multiwavelength OLED-OPD flexible PPG sensor with a time-interleaved, optimal high order adaptive analog filter-based readout system for the longtime continuous monitoring of PPG signal. First time, temperature modulation of the light absorption and scattering coefficient of the human skin and its compensation strategy has been explored in this study. This study intended to minimize the issue like motion artifacts and mispositioning. Analog front end of the readout circuit incorporates a transimpedance amplifier, optimal filter, programmable gain amplifier (1x to 7x), PWM-DAC based OLED intensity control, Bluetooth transceiver, MCU with inbuilt ADC and a power management unit. At the backend, digital control and pre-signal processing-algorithm are developed to improve the adaptability of the readout system against non-idealities which enable the readout system for the longtime continuous measurement of the biological sign. Digitally variable resistance is used herein to tune the central frequency of the bandpass filter which helps to minimize low heart rate issue. The sensing range of the readout circuit is 20nA to 10 mu A. With 3.3 V power supply the total power consumption of the readout system is 0.4W. Experimental result shows that the heart rate measurement error is less than 3.4bpm. In the worst case, the measured repulsive pulse transit time (RPTT) variation from PPG cycle to cycle is less than 2%.
Achieving high sensing in 0.5 nA for the driving pixel currents in AMOLEDs with settling time of 7 mu s by a new external current sensing circuit
(1970-01-01)
Pandey, Rajeev Kumar
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Huang, Tzu Hao
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Ho, Wei-Hsuan
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Pribadi, Eka Fitrah
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Chao, Paul C. -P.
A new external current sensing circuit with baseline compensation for the active matrix organic light emitting diode (AMOLED) display is developed herein to achieve the sensing precision of 0.5 nA in pixel with 7 mu s of settling time. Current sensing circuit incorporates a new push-pull transient current feedforward whereas the current analog to digital converter (CADC) based digital baseline current compensation incorporates an 11-bit current digital-to-analog converter, a current comparator and a digital control circuit with an 11-bit successive approximation register. The proposed integrated mixed signal IC drives a 6T1C pixel-based AMOLED panel with one horizontal time of 7.7 mu s at a scan frequency of 60 Hz. The design readout chip can simultaneously sense and compensate TFT baseline current variation. The readout circuit and the baseline compensation circuit are implemented in the integrated chip with chip area of 125 mu m x 46 mu m and fabricated via TSMC T18 process. With the standard 3.3 V supply, experimental result shows that the overall power consumption of the chip is 988 mu W watt. The minimum LSB current for the CADC is 10 nA and the maximum achievable sampling rate is 500 KS/s. The measured INL and DNL of CADC is 0.84 and 0.98 respectively. Despite of heavy data line parasitic capacitances (2.6 K ohm/20 pF) of the AMOLED display, experimental results show that the proposed circuit can sense 0.5 nA current within 7 mu s of settling time. The sensing precision of 0.5 nA within 7 mu s are the best among all reported literature to date whereas the current sense range (0.5-500 nA), system sampling rate (142 KS/s), INL (0.84) and DNL (0.98) of the CADC is approximately comparable among all reported.
High Resolution Comparator Design For RF Imager
(2018-01-01)
Pandey, Rajeev Kumar
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Pandey, Sanjeev Kumar
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電機資訊國際碩士學位學程
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EECS International Graduate Program-Master
This paper proposes a design of high resolution regenerative latch based comparator for Multi Ramp Multi slope ADC of RF 3D imager. The minimum sense voltage for the design comparator is 500nV. A wide swing-self biased fully differential folded cascode amplifier used as analog front end for regenerative latch. Due to fully differential architecture of the comparator noise immunity is high. Simulation is done by using TSMC 0.18um with 1.8V supply. The total Power consumption of design comparator is 0.842mW and total delay is 11 mu s.
Optimizing a novel PPG sensor patch via optical simulations towards accurate heart rates
(1970-01-01)
Pribadi, Eka Fitrah
;
Pandey, Rajeev Kumar
;
Chao, Paul C. -P.
;
電子工程學系及電子研究所
;
電機資訊國際碩士學位學程
This study proposes the design and optimization of the flexible OLED-OPD photoplethysmography (PPG) sensor patch to estimate the long time continuous heart rate. Using optical simulation, the distance between OLED-OPD and the aperture area of the OLED-OPD has been optimized to enhance the AC/DC ratio of the receive PPG signal. The optical simulation incorporates an empirical optical skin model. All the patches incorporate green OLED@525 nm wavelength and red OLED@630 nm wavelength. Simulation results show that the optimized AC/DC ratio of the cross-type patch for the green and the red OLED is 2.16% and 6.25%, respectively. Similarly, the optimized AC/DC ratio of the square-type patch for the green, and the red OLED is 9.6% and 5.8%, respectively. Experiment results show that the received PPG signal AC/DC ratio for the square type and cross-type are 2%@green OLED and 4.5% @green OLED, respectively. Also, the AC/DC ratio of the received PPG signal from the square type and cross-type are 1.4%@red OLED and 1.1%@red OLED, respectively. The AC/DC ratio is reduced because the skin and blood itself act as a lossy medium so that the DC signal increased more; as a result, the overall AC/DC ratio decrease. The best design of the optical patch is the square-type OPD patch due to the wide area of the OPD. The OLED drive current ranges between 0.1 and 0.4 mA. The average OPD current is 800 nA. The flexibility of the design PPG sensor patch is 130 degrees. The non-invasive square-type PPG sensor patch is applied to the wrist artery of 40 subjects for sensing the PPG pulsation of the blood vessel. The heart rate measurement accuracy is 95%, whereas the standard error rate is 0.37 +/- 1.96 bpm, respectively.