Browsing by Author "Peng, CS"

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CORDIC-based architecture with channel state information for OFDM baseband receiver
(2005-05-01)
Peng, CS
;
Chuang, YS
;
Wen, KA
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
An efficient architecture for OFDM baseband receiver based on coordinate rotation digital computer (CORDIC) algorithm is proposed with channel state information (CSI). Two dual-mode CORDIC modules are designed for synchronization and equalization. A modified demapping method using CSI helps to provide sub-channel status, and therefore decreases packet error rates especially for some sub-channels with extremely low SNR. A combined algorithm suitable for CORDIC is proposed for not only estimate and compensation of channels but synchronization for carrier frequency offset and sampling. clock offset. Allocation, timing analysis and complexity for all functional blocks in the receiver are proposed, including front-end processing, FFT inner receiver, and outer receiver. Complete tests for packet error rate are simulated under an integrated platform considering of RF front-end non-ideal parameters, filters, quantization, and channel models. Simulation results Of practical circuits on AWGN and channel models are presented and prove the improvement of the receiver. The design occupies about 424k equivalent gate count and 7.3 mm(2) core size in 0.18 mu m CMOS.
Early-late gate receiving for Bluetooth packet
(2001)
Peng, CS
;
Chang, MH
;
Wen, KA
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
An efficient early-late gate scheme for Bluetooth packet receiving had been proposed. It eliminates the use of Analog-to-Digital Converter (ADC) and expends only hundred gate counts to implement the timing recovery. Simulation with complete Bluetooth V1.0 baseband and radio specifications had been established to confirm the timing recovery algorithm. Field programmable gate arrays (FPGA) emulation and ASIC implementation had all been completed for performance analysis.
Synchronization for carrier frequency offset in wireless LAN 802.11a system
(2002)
Peng, CS
;
Wen, KA
;
電子工程學系及電子研究所
;
Department of Electronics Engineering and Institute of Electronics
This paper describes a synchronization method for carrier frequency offset (CFO) in Wireless LAN IEEE 802.11a system, which adopts OFDM-based transmission techniques and provides several different transmission data rates up to 54 Mbit/s. The algorithm proposed provides an acquisition and a tracking stage for CFO estimation and compensation. After the processes of synchronizer and equalizer, error vector magnitude is used to evaluate the system's performance under both AWGN and multipath fading channels. According to the simulation results, the algorithm resolve's CFO problems efficiently with reasonable complexity.