Browsing by Author "Qian, Xin-Hong"

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A 13.56 MHz 40 mW CMOS High-Efficiency Inductive Link Power Supply Utilizing On-Chip Delay-Compensated Voltage Doubler Rectifier and Multiple LDOs for Implantable Medical Devices
(2014-11-01)
Wu, Chung-Yu
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Qian, Xin-Hong
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Cheng, Ming-Seng
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Liang, Yu-An
;
Chen, Wei-Ming
In this paper, a 13.56 MHz CMOS near-field inductive link power supply (ILPS) that can deliver 20 mA output current for implantable medical devices (IMDs) is proposed and fabricated. In the proposed ILPS, the pair of inductive link coils is constructed in the spiral shape with a ferrite core to save space and increase efficiency. Experimental results have shown that the near-field coils can transmit power at the resonant frequency of 13.56 MHz with the transmission efficiency up to 76.3%. The CMOS power regulator is composed of active voltage doubler rectifier (VD) and low-dropout regulators (LDOs). In the active VD with the comparator, the input offset voltage is adjustable for delay compensation and a start-up control circuit is added to achieve robust start-up mechanism. On-chip delay compensation control with SR-latches is proposed to prevent from error glitch switching on offset voltage control and achieve accurate delay compensation so that the reverse current conduction can be avoided and the efficiency can be increased. Three fully-integrated LDOs with rectifier output voltage of 2 V to 1.8 V are realized for analog (ALDO), digital (DLDO), and reference-voltage (RLDO) circuits. Thus the performance of individual LDO can be optimized. The measured output ripple voltage of the active VD is 10.4 mV. The power conversion efficiency (PCE) is 85% under 20 mA output current. The measured dropout voltage is 384 mV. As compared with other designs, the proposed ILPS has lower ripple voltages, lower dropout voltage, and higher PCE.
A Bone-Guided Cochlear Implant CMOS Microsystem Preserving Acoustic Hearing
(2017-01-01)
Qian, Xin-Hong
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Wu, Yi-Chung
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Yang, Tzu-Yi
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Cheng, Cheng-Hsiang
;
Chu, Hsing-Chien
In this paper, a bone-guided cochlear implant (BGCI) SOC microsystem is proposed and designed. The BGCI microsystem uses four or more electrodes placed on the bone surface of the cochlea and one on the round window to preserve partially the acoustic hearing. The external SOC of the BGCI processes the acoustic signals and generates stimulation patterns and command that are transmitted to the implanted chip through the 13.56MHz wireless power and bidirectional data telemetry. The implanted chip with 4-channel high-voltage-tolerant stimulator generates biphasic stimulation currents up to 800 mu A and sends back the power indication and electrode impedance error signals to the external SOC. Electrical tests on the fabricated BGCI has been performed. The in-vivo animal tests on guinea pigs has shown the evoked Wave III of EABR waveforms. The proposed BGCI can be applied to patients with high-frequency hearing loss, tinnitus, and dizziness.
A CMOS 13.56-MHz High-Efficiency Low-Dropout-Voltage 40-mW Inductive Link Power Supply Utilizing On-Chip Delay-Compensated Voltage Doubler Rectifier and Multiple LDOs for Implantable Medical Devices
(2013)
Qian, Xin-Hong
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Cheng, Ming-Seng
;
Wu, Chung-Yu
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電子物理學系
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Department of Electrophysics
A near-field 13.56-MHz 20mA inductive energy transmission device with ferrite core spiral coils and CMOS power regulator is designed and tested. The power regulator is composed of active voltage doubler (VD) rectifier and low-dropout regulators (LDOs). In order to avoid large space requirement of coil and further increase its efficiency in the implantable medical devices (IMDs), the coils are constructed in the spiral shape with a ferrite core. In the VD with the comparator, the input offset voltage is adjustable for delay compensation and a start-up control circuit is added to achieve robust start-up mechanism. On-chip delay compensation control is implemented to prevent from reverse current conduction and increase the efficiency. Three fully-integrated LDOs with rectifier output voltage of 2V to 1.8V are realized: LDO for analog circuits (ALDO), LDO for digital circuits (DLDO) and LDO for reference-voltage circuits (RLDO). Thus the performance of individual LDO can be optimized. Both ALDO and RLDO have low crosstalk noise from DLDO. The measured ripple voltage of rectifier output is 10.4mV. The power conversion efficiency (PCE) of 85% with 20mA output current. The measured dropout voltage is 384mV. As compared with other designs, the proposed Inductive link power supply has lower ripple voltages and dropout voltage, and higher PCE.
A Fully Integrated 16-Channel Closed-Loop Neural-Prosthetic CMOS SoC With Wireless Power and Bidirectional Data Telemetry for Real-Time Efficient Human Epileptic Seizure Control
(2018-11-01)
Cheng, Cheng-Hsiang
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Tsai, Ping-Yuan
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Yang, Tzu-Yi
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Cheng, Wan-Hsueh
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Yen, Ting-Yang
A 16-channel closed-loop neuromodulation system-on-chip (SoC) for human epileptic seizure control is proposed and designed. In the proposed SoC, a 16-channel neural-signal acquisition unit (NSAU), a biosignal processor (BSP), a 16-channel high-voltage-tolerant stimulator (HVTS), and wireless power and bidirectional data telemetry are designed. In the NSAU, the input protection circuit is used to prevent MOSFET from overstressing by the high-voltage stimulations. Hence, NSAUs can share electrodes with stimulators. The auto-reset chopper-stabilized capacitive-coupled instrumentation amplifiers (AR-CSCCIAs) are designed with the chopper-stabilized technique with a new offset reduction loop. The measured input-referred noise is 2.09 mu V-rms and the noise-efficiency factor (NEF) is 3.78. The entropy-and-spectrum seizure detection algorithm is implemented in the BSP with 0.76-s seizure detection latency and 97.8% detection accuracy. When the seizure onset is detected by the BSP, the HVTS with adaptive supply control delivers 0.5-3-mA biphasic current stimulation to suppress the seizure onset. The proposed SoC is powered wirelessly, and the bidirectional data telemetry is realized through the same pair of coils in 13.56 MHz. The downlink data rate is 211 Kb/s with the binary phase-shift keying (BPSK) modulation and a new BPSK demodulator. The uplink data rate is 106 Kb/s with the load-shift keying (LSK) modulation. The proposed SoC is fabricated in a 0.18-mu m CMOS technology and occupies 25 mm(2). Electrical tests have been performed to characterize the SoC performance. In vivo animal experiments using mini-pigs have been performed to successfully verify the closed-loop neuromodulation functions on epileptic seizure suppression.
A Fully Integrated Closed-Loop Neuromodulation SoC with Wireless Power and Bidirectional Data Telemetry for Real-Time Human Epileptic Seizure Control
(2017-01-01)
Cheng, Cheng-Hsiang
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Tsai, Ping-Yuan
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Yang, Tzu-Yi
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Cheng, Wan-Hsueh
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Yen, Ting-Yang
This paper presents a 16-channel closed-loop neuromodulation SoC for human seizure control. The SoC includes a 16-ch signal acquisition unit, a bio-signal processor, a 16-ch adaptive stimulator, and wireless telemetry. The signal acquisition unit achieves 3.78 NEF and shares electrodes with stimulator. The seizure detection latency is 0.76s and delivered 0.5-3mA biphasic current stimulation. The SoC is powered wirelessly and bidirectional data telemetry is realized through the same pair of coils in 13.56MHz.
A Microfabricated Coil for Implantable Applications of Magnetic Spinal Cord Stimulation
(2015)
Fu, Yu-Min
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Chen, Che-Yu
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Qian, Xin-Hong
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Cheng, Yu-Ting
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Wu, Chung-Yu
In this paper, a microfabricated inductive coil comprising of 125-turn coil windings and a MnZn-based magnetic core in a volume of 200 mm(3) is presented for the magnetic neural stimulation in a spinal cord. The coil winding with the parallel-linkage design instead of the typical serial-linkage one is proposed not only to provide better design flexibility to the current mode driving circuit but also to simplify the fabrication process of the 3-D inductive coil, which can further advance the coil miniaturization. Experimental results show the microcoil with a 1.5 A, 1 kHz square-wave current input can induce a voltages of 220 mu V on the conducting wire with an impedance of similar to 0.2 Omega @ kHz, 1 mm separation.
Design and In Vivo Verification of a CMOS Bone-Guided Cochlear Implant Microsystem
(2019-11-01)
Qian, Xin-Hong
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Wu, Yi-Chung
;
Yang, Tzu-Yi
;
Cheng, Cheng-Hsiang
;
Chu, Hsing-Chien
Objective: To develop and verify a CMOS bone-guided cochlear implant (BGCI) microsystem with electrodes placed on the bone surface of the cochlea and the outside of round window for treating high-frequency hearing loss. Methods: The BGCI microsystem consists of an external unit and an implanted unit. The external system-on-chip is designed to process acoustic signals through an acquisition circuit and an acoustic DSP processor to generate stimulation patterns and commands that are transmitted to the implanted unit through a 13.56 MHz wireless power and bidirectional data telemetry. In the wireless power telemetry, a voltage doubler/tripler (2X/3X) active rectifier is used to enhance the power conversion efficiency and generate 2 and 3 V output voltages. In the wireless data telemetry, phase-locked loop based binary phase-shift keying and load-shift keying modulators/demodulators are adopted for the downlink and uplink data through high-Q coils, respectively. The implanted chip with four-channel high-voltage-tolerant stimulator generates biphasic stimulation currents up to 800 mu A. Results: Electrical tests on the fabricated BGCI microsystem have been performed to verify the chip functions. The in vivo animal tests in guinea pigs have shown the evoked third wave of electrically evoked auditory brainstem response waveforms. It is verified that auditory nerves can be successfully stimulated and acoustic hearing can be partially preserved. Conclusion and Significance: Different from traditional cochlear implants, the proposed BGCI microsystem is less invasive, preserves partially acoustic hearing, and provides an effective alternative for treating high-frequency hearing loss.
The Design of CMOS 13.56-MHz High Efficiency 1X/3X 1.99V/6.29V Active Rectifier for Implantable Neuromodulation Systems
(2018-01-01)
Wang, Sung-Hao
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Lee, Yueh-Hsuan
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Qian, Xin-Hong
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Wu, Chung-Yu
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電子工程學系及電子研究所
A 13.56MHz high efficiency CMOS 1X/3X active rectifier with a novel active triple-voltage(3X) rectifier is proposed and verified. The proposed rectifier is specially designed for medical implant systems. It provides 1X/3X dual output voltage (1.99V and 6.29V) allowing the implantable neuromodulation system to operate with high power conversion efficiency (PCE) while stimulating simultaneously. A start-up control circuit is also added to achieve robust start-up mechanism. On-chip delay compensation control is implemented to increase the conduction time, avoid reverse current, and enhance the efficiency. In addition, the rectifier can sustain a higher input inductive voltage without the overstress problem by adding cascode power transistors. The measured dual output voltages of the 1X/3X rectifier are 1.99V and 6.29V while the input inductive voltage is 2.75V. The proposed rectifier achieves 84.2% in PCE with total 57mW output power under 13.56 MHz operation frequency. Based on its capability to provide large output voltage for stimulation with high PCE, the proposed 1X/3X active rectifier is suitable for implantable neuro-modulation systems.