Browsing by Author "Rao, Pei-Zong"

Now showing 1 - 9 of 9

A 2.45/5.2 GHz Image Rejection Mixer With New Dual-Band Active Notch Filter
(2009-11-01)
Liang, Ching-Piao
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Rao, Pei-Zong
;
Huang, Tien-Jien
;
Chung, Shyh-Jong
;
電信工程研究所
A 2.45/5.2 GHz dual-band Gilbert downconversion mixer with image rejection function is presented, which is implemented using the 0.18 mu m CMOS technology. The proposed differential dual-band image rejection circuitry is employed for the 2.45/5.2 GHz WLAN application to effectively diminish the dc power consumption and complexity of circuit design compared to the traditional Hartley or Weaver architectures. Moreover, the cross-connected pair consisted of NMOS and PMOS transistors in the proposed notch filter will further ameliorate the image rejection capability. The IC prototype achieves conversion gain of 10.5/11 dB, IIP3 of -4.9/-5.2 dBm for RF = 2.45/5.2 GHz and IF = 500 MHz while the image rejection ratio is better than 36/45 dB in the whole operation bandwidth.
A Low-power Low-voltage Current-reused Voltage-controlled Oscillator with Amplitude-balanced Technique
(2017-01-01)
Lin, Chun-Yi
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Lin, Yu-Kei
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Rao, Pei-Zong
;
Tarng, Jenn-Hwen
;
Chung, Shyh-Jong
A current-reused voltage-controlled oscillator (CRVCO) with amplitude-balanced technique is presented. A cascode cross-coupled pair is adopted, which is used to improve the difference between the differential output amplitudes of CRVCO at a 1.3V supply voltage. The measured amplitude imbalance ratio is less than 0.15%. The measured phase noise is -114 dBc/Hz at 1 MHz offset when oscillation frequency is at 7.8 GHz, resulting in an FOM of -187 dBc/Hz.
A wideband CMOS mixer with feedforward compensated differential transconductor
(2007)
Rao, Pei-Zong
;
Chang, Tang-Yuan
;
Liang, Ching-Piau
;
Chung, Shyh-Jong
;
電信工程研究所
A 2.4 to 10.7 GHz wideband mixer for multi-band orthogonal frequency division multiplexing ultra-wideband (MB-OFDM UWB) applications is designed using a TSMC 0.18 mu m CMOS technology. The designed mixer uses a LC folded cascode structure and a feedforward compensated high-linearity differential transconductor to improve the linearity. The measured results reveal that the proposed mixer achieves power conversion gain of 3.3 +/- 1.5 dB, third-order input intercept point (IIP3) of 6.9 dBm, and input l-dB compression point (P-1dB) of -2.8 dBm in the power consumption of 14.4mW from a 1.8V power supply. The chip area is 0.70 x 0.58 mm(2).
An Ultra-low-voltage CMOS VCO Using Parallel Capacitor for Phase Noise Reduction
(2012)
Lin, Chun-Yi
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Rao, Pei-Zong
;
Chiu, Hsen-Hung
;
Chung, Shyh-Jong
;
傳播研究所
In this work, a 7.92 GHz ultra-low-voltage LC-tank voltage controlled oscillator (VCO) is introduced. The proposed LC-tank VCO adopts a NMOS cross-coupled topology and additional parallel capacitors for low voltage operation and phase noise reduction. The measured phase noise at 600 KHz frequency offset is -98 dBc/Hz and at 1 MHz offset is -108 dBc/Hz, respectively. The proposed VCO achieves a figure-of-merit (FOM) value of -187 dBc/Hz, drawing 0.87 mW from a 0.62V supply. The proposed circuit topology is designed for ultra wide-band (UWB) applications and implemented in TSMC 0.18 mu M CMOS technology.
An Ultra-Wideband High-Linearity CMOS Mixer With New Wideband Active Baluns
(2009-09-01)
Rao, Pei-Zong
;
Chang, Tang-Yuan
;
Liang, Ching-Piao
;
Chung, Shyh-Jong
;
電信工程研究所
A 2-11-GHz high linearity CMOS down-conversion mixer with wideband active baluns using 0.18-mu m CMOS technology is demonstrated in this paper. The mixer employs a folded cascode Gilbert cell topology and on-chip broadband active baluns. The folded cascode approach is adopted to increase the output swing, and the linearity is enhanced by a harmonic distortion canceling technique derived from the harmonic balance analysis. The proposed configuration shows the highest HP(3) and IP(1 dB), and exhibits more compact size than most published studies. A broadband active balun is used to generate wideband differential signals, together with the derivation of a closed-form expression for the phase imbalance. This single-ended wideband mixer has the conversion gain of 6.9 +/- 1.5 dB, input 1-dB compression point (IP(1 dB)) of - 3.5 dBm, single-sideband noise figure of 15.5 dB, and third-order input intercept point (HP(3)) of 6.5 dBm under the power consumption of 25.7 mW from a 1.8-V power supply. The chip area is 0.85 x 0.57 mm(2).
Analysis and Design of Triple-band Input Matching for CMOS Low-noise Amplifier
(2012)
Lin, Chun-Yi
;
Liang, Ching-Piao
;
Rao, Pei-Zong
;
Chung, Shyh-Jong
;
傳播研究所
This paper presents the analysis and design of a triple-band low-noise amplifier (LNA) fabricated in a 0.18 mu m CMOS process. The triple-band operation is achieved by adding a switch component in a dual-band input network of an LNA, so that it can function at 2.5, 3.5, and 5.2 GHz. The proposed method can effectively decrease the chip area as compared to conventional designs. In addition, based on the design procedures provided in this paper, the component values of the triple-band input network can be accurately calculated to reduce the complication of the circuit design.
Analysis and Design of Two Low-Power Ultra-Wideband CMOS Low-Noise Amplifiers With Out-Band Rejection
(2010-02-01)
Liang, Ching-Piao
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Rao, Pei-Zong
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Huang, Tian-Jian
;
Chung, Shyh-Jong
;
電信工程研究所
Two 3-5-GHz low-power ultra-wideband (UWB) low-noise amplifiers (LNAs) with out-band rejection function using 0.18-mu m CMOS technology are presented. Due to the Federal Communications Commission's stringent power-emission limitation at the transmitter, the received signal power in the UWB system is smaller than those of the close narrowband interferers such as the IEEE 802.11 a/b/g wireless local area network, and the 1.8-GHz digital cellular service/global system for mobile communications. Therefore, we proposed a wideband input network with out-band rejection capability to suppress the out-band properties for our first UWB LNA. Moreover, a feedback structure and dual-band notch filter with low-power active inductors will further attenuate the out-band interferers without deteriorating the input matching bandwidth in the second UWB LNA. The 55/48/45 dB maximum rejections at 1.8/2.4/5.2 GHz, a power gain of 15 dB, and 3.5-dB minimum noise figure can be measured while consuming a dc power of only 5 mW.
Cascode feedback amplifier combined with resonant matching for UWB system
(2007)
Rao, Pei-Zong
;
Cheng, Yuh-Chuan
;
Liang, Ching-Piau
;
Chung, Shyh-Jong
;
電信工程研究所
This paper shows the design of a broadband single-end low noise amplifier for UWB system with TSMC 0.18 mu m. CMOS processes. The proposed amplifier achieves broadband input matching by cascode feedback topology with parallel resonate cavity and the bandwidth is from 3.1 GHz to 10.1 GHz. The simulation results are as follows: 12 I dB of gain, the input/output return loss are greater than 10 dB, minimum noise figure is about 3.3 dB, and 1 dB gain compression point is about -15 dBm. The total current consumption included bias network is 9.1 mA under a 1.8 V single supply voltage. Chip area is 0.8 nun x 0.8 mm.
Temperature-Insensitive Gyrator-based Active Inductor with the Complementary Technique and Its Applications
(2014)
Lin, Chun-Yi
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Li, Wei-Tsung
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Rao, Pei-Zong
;
Chung, Shyh-Jong
;
電信工程研究所
In this paper, a novel temperature-insensitive gyrator is proposed with a temperature-compensated technique. The proposed gyrator-based active inductor composed of two back-to-back transconductors with a complementary technique are realized in triple-well 0.18-mu m CMOS technology. The complementary circuit topology is adopted to decrease the variation caused by temperature effect on the tranceconductance of the gyrator. Based on the temperature-compensated gyrator, the measured resonate frequency variation of the proposed gyrator-based active LC-tank circuit topology is less than 1% from 8.72% when the temperature varies from -20 to +60 degree centigrade (C-0). The value of frequency variation percentage over per degree centigrade is simply 0.012 which presents a lowest frequency variation than the traditional gyrator topology.