Browsing by Author "Roska, Tamas"

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A neuromorphic chip that imitates the ON brisk transient ganglion cell set in the retinas of rabbits
(2007-09-01)
Lin, Li-Ju
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Wu, Chung-Yu
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Roska, Botond
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Werblin, Frank
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Balya, David
In this paper, a new CMOS design methodology is proposed to implement CMOS neuromorphic chips which imitate the ON brisk transient ganglion cell (GC) set of rabbits' retinas. The measurement results on the fabricated CMOS neuromorphic chip are consistent with the biological measurement results. Thus, the biological functions of the chip have been successfully verified. It can be used to understand more biological behaviors and visual language of retinas under different input optical images which have not yet been tested in biological experiments. Based on the results, the full GC sets of retina can be designed. Thus, many potential applications of retinal chips on motion sensors, computer vision, retinal prosthesis, and biomedical devices are feasible.
Bio-inspired 0.35 mu m CMOS Time-to-Digital Converter with 29.3ps LSB
(2006)
Mozsary, Andras
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Rodriguez-Vazquez, Angel
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Chung, Jen-Feng
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Roska, Tamas
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電控工程研究所
Time-to-Digital Converter (TDC) integrated circuit is introduced in this paper. It is based on chain of delay elements composing a regular scalable structure. The scheme is analogous to the sound direction sensitivity nerve system found in Barn Owl. The circuit occupies small silicon area, and its direct mapping from time to position-code makes conversion rates up to 500Msps possible. Specialty of the circuit is the structural and functional symmetry. Therefore the role of START and STOP signals are interchangeable. In other words negative delay is acceptable: The circuit has no dead time problems. These are benefits of the biology model of the auditory scene representation in the bird\'s brain. The prototype chip is implemented in 0.35 mu m CMOS having less than 30ps single-shot resolution in the measurements.
Function-in-layout: A demonstration with bio-inspired hyperacuity chip
(2007-03-01)
Mozsary, Andras
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Chung, Jen-Feng
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Roska, Tamas
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電控工程研究所
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Institute of Electrical and Control Engineering
Below 100nm a new scenario is emerging in VLSI design: floorplanning and function are inherently interrelated. Using mainly local connectivity, wire delay and crosstalk problems are eliminated. A new design methodology is proposed, called function-in-layout, that possesses: regular layout, mainly local connectivity, functional 'parasitics'. A bio-inspired demonstration is presented, a hyperacuity chip, with 30 ps time difference detection using 0.35 mm complementary metal-oxide semiconductor (CMOS) technology. Copyright (C) 2006 John Wiley & Sons, Ltd.
Special issue on cellular wave computing architectures, Part II
(2009-05-01)
Roska, Tamas
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Arena, Paolo
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Lin, Chin-Teng
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Tetzlaff, Ronald
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工學院